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AI Wake Up Call on silicon

Forging the Future of Keyword Spotting with Generative AI on the Caravel SoC
Awarding up to $30,000 of silicon

The challenge aims to leverage generative AI to develop an open-source hardware accelerator designed explicitly for Keyword Spotting (KWS) applications on the Caravel System-on-Chip.

Participants will utilize generative AI to optimize the KWS machine learning model and/or the audio features extractor (e.g., MFCC) to create an energy-efficient KWS accelerator that seamlessly integrates into the Caravel SoC environment.

To join the challenges participants must register below by
Friday April 12, 2024 @ 11:59pm Pacific Time.


In this contest, we invite you to utilize generative AI such as chatGPT, Gemini, Claude, Copilot, or similar tools to design a chipIgnite project targeted to an open-source hardware accelerator designed specifically for Keyword Spotting (KWS) applications.

Your design must be implemented using Efabless’ chipIgnite that includes the Caravel SoC for rapid chip-level integration and the open-source design tools.

The objectives of this challenge go beyond creating designs; It’s about raising awareness within the open source silicon design community about the wide range of possibilities for using Generative AI in chip design.

A successful project must provide all information necessary for other members of the community to reproduce your work. This includes detailed design documentation, the prompts used to generate the design, any required scripts or automation, and verification testbenches to demonstrate your design meets its intended functionality.

Key Dates

Dates Activity
21-March Launch Challenge
12-April Submit Proposals & GitHub repo README.md
30-April Updated documentation about architecture choices
23-May Final Submission
27-May Winner Selection
03-June Winner Announcement
03-June chipIgnite tapeout


  1. Join the challenge channel #generative-ai on our Open-Source-Silicon Slack space.
  2. A 2-minute video showing how to generate a simple design using Generative AI
  3. Explore and learn from winning projects from the first, second and third challenge
  4. For chip implenmexation use Getting Started set of videos

Award: Up to $30K chipIgnite Silicon Value

Be among one of the first to design and tapeout an AI generated open-source silicon design. Participants will be eligible to win free fabrication for their design and receive public recognition and promotion of their design by Efabless. We are targeting to select at least three winners and designs to be fabricated based on the quality of the submissions. We are also working with industry partners to support fabricating additional projects.

In addition, each submission that meets the requirements will received a development board with a fabricated chip from one of the winning projects.

How to Enter

  1. Register a participant the challenge HERE

  2. Create a public GitHub repo and use it to commit all design data

  3. Send an email with a link to the repo to genai@efabless.com with “AI Wake Up Call Submission” in the subject line.

  4. In preparation for final submission create a public project on the chipIgnite CI 2406 shuttle using the GitHub repo from the previous step. Please include AI-design-contest in the label field when you create your project.

  5. Complete the remainder of the billing and shipping information as well as terms and export agreements. You will not be charged or invoiced for your submission. Complete the final submission for the project on the platform.

  6. Send an email to genai@efabless.com with a link to your project.

Limit one entry per person, per email address. Your entry must be original.

Note: If you have not received permission to use copyrighted material, you may not include the material in your entry.

Judging Criteria:

All designs will be judged by a panel of experts who share a lifelong commitment to electronics and believe in the power of AI and machine learning to drive innovation. Below are the evaluation criteria:

  • Project Documentation
  • Prompt Documentation
  • Code Quality
  • Verification Coverage
  • Design Technical Merit
  • Methodology Technical Merit
  • Project Description and Community Interest Poll

All requirements must be met to be eligible to win

  1. All submission content, documentation, prompt must be in English
  2. A short description of the project must be included with your design. It will be used for introducing your idea in the community poll.
  3. All designs must be implemented and fit in the Caravel User Project area.
  4. The Verilog for the design must be coded by AI.
  5. Verification may be done outside of the AI environment but verification testbenches must be provided as a reproducible element of this process.
  6. All prompts or auto GPT session logs used in the design must be provided as part of the deliverables for the design.
  7. The design needs to be open source with all materials required to reproduce made public.
  8. To facilitate reproducibility by the community, we recommend the design be implemented using the OpenLane chipIgnite flow including all configuration and run results. However, we will accept any open-source implementation flow provided it is documented and reproducible.
  9. Must have testbenches for RTL verification as well as constraints for STA and SDF simulations.
  10. Must be implementable in SKY130 with available standard cells and DFFRAM and not require open RAM or other discrete memories for implementation.
  11. The design must pass precheck and tapeout submissions on the Efabless platform.
  12. Winners must provide a video and screenshots demonstrating the creation of the project in a how-to or step-by-step format. The images and link to the video must be included in the documentation for their project in the GitHub repo. These materials may be used by Efabless for promotional purposes.

Judging Panel


Evgeni Gousev

Senior Director; Qualcomm

Chairman; tinyML Foundation


J. Augusto de Oliveira

Former CTO; Cypress Semiconductor
CSO/CTO Rocky Crest Consulting
Associate Director, TD Shepherd


Naveed Sherwani

Chairman, President & CEO; RapidSilicon

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Dr. Hammond Pearce

Lecturer (Assistant Professor) at UNSW Sydney School of Computer Science and Engineering


Brandon Wang

VP, Corporate Strategy Group, Office of the CEO

Official Rules


Participants must be able to receive silicon and parts shipped from the United States. As such, members of United States embargoed or sanctioned countries are not eligible to participate.

Current employees of Efabless or their family members are also not eligible to participate.


The submission deadline is Thursday, May 23, 2024 at 11:59 pm PT.


The contest is sponsored by Efabless Corporation, 165 University Ave, Palo Alto, CA 94301

Agreement to Official Rules

Participation in the contest constitutes participant’s full and unconditional agreement to and acceptance of these Official Rules and the decision of the Sponsor, which are final and binding.

An entry may be rejected at the sole and absolute discretion of Efabless.

By entering the contest, you agree and allow Efabless to use, display, and publish a winner's identity, including their name and photo, in promotional materials. The participants also agree that Efabless has the right to use participant’s designs and other material in sales and marketing.

Contest Winner Announcement

Contest winners will be announced on Thursday, May 30, 2024.

The winner will be provided fabrication at no cost in the June 3rd, chipIgnite shuttle, CI 2406.


If you have any questions, send a message to genai@efabless.com and join the Slack community channel #generative-ai

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