TinyTapeout is a simplified way to get your digital designs onto silicon. If you have Verilog ready to go, you can submit it for manufacture in a few hours.

By splitting a single chipIgnite slot into 384 pieces, we can lower the cost of entry to $100 for one chip mounted onto an evaluation board (excluding taxes) .

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Larger designs can be accommodated by buying extra tiles for $50. Each tile is about 160 x 100um and provides enough space for around 1000 standard cells.

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Designs get clock, reset and 24 IOs operating at up to 50MHz. Find out more about the specifications here.

There have been 4 submissions so far. The most recent run was Tiny Tapeout 04 which includes 143 projects. Designs include CPUs, FPGAs, games and music. A variety of HDLs were used including Verilog, Spinal and Spade.

Tiny Tapeout 5 closes on November the 4th. Submit your design here.

Tiny Tapeout is a project from Matt Venn and Uri Shaked and sponsored by Efabless.