BLOG: Webinar: How to design a RISC-V SoC

Now that we have covered major components of chip design through our online platform, we think this is the right time to move from “chip designing” to “chip planning”

Chip Planning involves lot of decision making like, analog peripheral (ADC, DAC, POR, etc.), digital peripheral (UART, flash controller), memory mapping, top level connections like pad-frame, level-shifters, GPIO and many more.

Do you want to know what it is like to build a city? Enroll in webinar on 3rd March from 9am to 1pm IST with Mohamed Kassem, Tim Edwards and Kunal Ghosh from VLSI System Design Corp. Pvt. Ltd..

This is the perfect webinar for to grow and stay ahead of curve in Semiconductor and Chip design. Enroll and stay ahead

Register