Block Diagram

Clocking System

 0.08 MHz
 0.04 MHz
 16.0 MHz
 8.0 MHz
Component Core Area (mm²) Required Pins Optional Pins I/Os
Please Add Peripherals.
The maximum I/Os for this package is , but your configuration has total I/Os.
The maximum die area for this package is mm², but your configuration has mm².

Final pin mapping will be based on design layout

Clock Setting


Clock Selection System Clk Freq Peripheral Clk
0.04 MHz

Run Mode Profile Configuration


Stop Run Mode Op Current (μA) Clock
Mode 1 2 3 4 5 I(D) I(A) (MHz)
RC Oscillator (10kHz) 0.0 0.3 0.08
Crystal Oscillator (1 - 4 MHz) 0.0 149.8 0.08

Total Current by Run Mode


Run Mode Use percentages must total 100%
Operating Current (mA)
#1 #2 #3 #4 #5
Digital (VDD=1.8V) 0.0 0.0 0.0 0.0 0.0
Analog (VDDA=3.3V) 0.15 0.15 0.15 0.15 0.15
Run Mode Use (%)

Power Consumption Estimate Summary


Operating Current (mA) Stop Mode Standby Mode
Run (all) Run (weighted) (nA) (nA)
Digital (VDD=1.8V) 0.0 0.0 0.0 0.0
Analog (VDDA=3.3V) 0.15 0.15 0.0 0.0

BLOCK DIAGRAM

SPECIFICATIONS

CPU None Selected
Memory None Selected
Internal Clk

Robust 10 kHz low-voltage RC oscillator with internal R and C.

External Clk

Robust 1 - 4 MHz crystal oscillator.

PACKAGE


POWER CONSUMPTION ESTIMATE


Operating Current (μA) Stop Mode Standby Mode
Run (all) Run (weighted) (nA) (nA)
Digital (VDD=1.8V) 0.0 0.0 0.0 0.0
Analog (VDDA=3.3V) 0.15 0.15 0.0 0.0

0

0

0 mm²

0