Open MPW
My Projects / Public Projects
Shuttle: Open MPW / MPW-ONE / MPW-TWO

Caravel-AES128 public

Michael Gielda | https://antmicro.com

A template SoC for Google sponsored Open MPW shuttles for SKY130.

vdp-lite public

Dan Rodrigues | https://github.com/dan-rodrigues

VGA sprite generator for the SKY130 Open MPW shuttles.

Caravel public

Michael Stetzler

A 10 bit DAC and an analog neural network neuron.

Caravel_sha3_256_... public

Jean Cyr | http://jeancyr.com

SHA-3 cryptomining SoC for Google sponsored Open MPW shuttles for SKY130.

Caravel public

Sylvain Munaut | https://github.com/PyFive-RISC-V

Peripherals tests for future SoC targeting Micro/Circuit Python

rapcores public

Steve Kelly | http://rapcores.org

RAPcore motor and motion controller on the Google sponsored Open MPW shuttles for SKY130.

MorphleLogic public

Merik Aart Voswinkel | http://www.fiberhood.org

A test-wafer for testing Mophle Logic reconfigurable hardware for SKY130.

RT-PseudoRNG public

Álvaro Jover Álvarez | https://www.upc.edu/en

A pseudo random number generator oriented towards random cache placement and replacement for...

caravel_amsat_txrx_ic public

Thomas Parry | N/A

Amatuer Radio Satellite Transceiver (SKY130) - Caravel Submission

Caravel-SOFA-HD public

Xifan TANG | https://sites.google.com/site/pegaillardon/home

SOFA-HD (Skywater Opensource FPGAs)

Ghazi SoC public

Zain Khan | http://merledupk.org

An SoC (System on a Chip) design for Google sponsored Open MPW shuttles for SKY130.

caravel_fulgor_opamp public

Diego Joaquín Hernando | http://www.fundacionfulgor.org.ar/sitio/index.php

Operational amplifier (opamp) based on the Miller topology designed in Skywater SKY130 CMOS process.

q-rib public

Dimitri del Marmol | https://github.com/0x01be

A template SoC for Google sponsored Open MPW shuttles for SKY130.

FWPayload public

Matthew Ballance | http://github.com/mballance

A simple RISC-V core+peripherals subsystem for the Google-sponsored Open MPW shuttles for SKY130.

OpenTDC public

Tristan Gingold

Time to Data Converter with Fine Delay

Skywater 130 Decred... public

Matt Aamold

Decred implementation of blake256r14 cryptomining SoC for Google sponsored Open MPW shuttles for SKY130.

linsorter public

Vladimir Milovanović | elektrotehnika.github.io

A digital linear insertion sorter accelerator.

Caravel public

Arya Reais-Parsi | http://efabless.com

A template SoC for Google sponsored Open MPW shuttles for SKY130.

crypto-accelerator-chip public

Anish Singhani

ASIC containing a combined AES128/256 accelerator core and a VGA graphics/game demo

Caravel-QLSOFA-HD public

K.C. Yap | https://sites.google.com/site/pegaillardon/home

QLSOFA-HD (Skywater Opensource FPGAs)

Analog_RF_MPW public

Affan Abbasi | https://www.linkedin.com/in/affanabbasi/

Analog & RF designs

DSP48 DAC public

Bittu N | none

A very simple design for the first SKY130 shuttle.

Caravel-SOFA-CHD public

Xifan TANG | https://sites.google.com/site/pegaillardon/home

SOFA-CHD (Skywater Opensource FPGAs)

Caravel_RISCV_OSU public

James Stine | https://vlsiarch.ecen.okstate.edu/

Caravel_RISCV_OSU is an implementation of a single-cycle RISC-V processor inside of the Caravel...

10_bit_potentiometric_DAC public

Sameer Durgoji | https://www.vlsisystemdesign.com/

Design of a 10 Bit Potentiometric Digital to Analog Converter with 3.3V analog voltage, 1.8V...

8x_PLL_Clock_Multiplier public

Subham Mohapatra | https://www.vlsisystemdesign.com/

8x PLL Clock Multiplier. Input frequency ranges from 5MHz to 12MHz and output frequency is from...

AFTx06_Caravel public

John Martinuk | https://engineering.purdue.edu/SoC-Team/about

Purdue's University's Socet Undergraduate Team Creates Soc's, Aimed To Be Integrated Into Low...

AXI DMA using Spinal... public

Pu Wang

This is a DMA controller with AMBA AXI4 interface. This DMA controller is part of an ongoing...

Alperens SOC public

Alperen Bolat

Custom Risc V processor design

Amsat TXRX IC MPW2 public

Thomas Parry | https://github.com/yrrapt/amsat_txrx_ic

This step in the development and prototyping of the Amateur Radio Satellite Transceiver project...

Analog Neural Network public

Lakshmi S | https://www.gatech.edu/

Analog Neural Network

AutomaticStandard... public

Philipp Gühring | https://libresilicon.com/

At Libresilicon we have been working for several years on making chipdesign and production...

Bandgap_Reference_Design public

Swarup Pulujkar | https://www.vlsisystemdesign.com

A Bandgap Reference Circuit To Generate A Constant Voltage Output That Is Insensitive To...

BrqRV_EB1 public

hamza shabbir

BrqRV EB1 is a machine-mode (M-mode) only, 32-bit CPU small core which supports RISC-V’s integer...

Caravel public

Mohamed Shalan, Ph.D. | http://efabless.com

NFive32-Based SoC to validate several open-source projects and IPs.

Caravel Plus public

Mohamed Shalan, Ph.D. | http://efabless.com

Caravel management SoC attached to the largest possible SRAM that can fit the user's area.

Caravel-OpenFPGA-EF public

Manar Abdelatty | http://efabless.com

A template SoC for Google sponsored Open MPW shuttles for SKY130.

Caravel-Sermo public

Department of Electrical Engineering UET Lahore | https://uet.edu.pk/

The project implements a PID controller using encoder feedback and single channel of PWM output...

Caravel_Astria_Testchip public

Astria Nur Irfansyah | http://www.its.ac.id

Test circuits consisting of synthesizable comparators for a stochastic ADC, to be submitted for...

Caravel_EL2_SoC public

Jeff DiCorpo

A template SoC for Google sponsored Open MPW shuttles for SKY130.

Caravel_FPU public

komaljaved-lm | https://lampromellon.com/

Caravel_FPU integrates floating point unit with Caravel Core. It is capable of doing floating...

Caravel_Fault_SPM public

Jeff DiCorpo

The repo contains SPM with DFT structure integrating with the Caravel chip. For the SPM/DFT...

Caravel_Multi_encoder public

Manikandan Nagarajan

Multi purpose integrated encoder

Caravel_Multi_encoder-v1 public

Manikandan Nagarajan

Multipurpose integrated encoder

Chameleon SoC public

Mohamed Shalan, Ph.D. | http://efabless.com

AHB-Lite based SoC for IBEX

Columbus public

Tom Stanway-Mayers

Analog Test Chip Consisting of the following: LDO, Load Switch, Bandgap Reference, and an OpAmp

Comparator VCO... public

Malay Das | https://www.vlsisystemdesign.com/

Comparator at 3v3 Supply Voltage Voltage Controlled Oscillator with 7 stage ring oscillator...

DVSoC public

Dilip Vasudevan


Digital PLL public

Amro Tork | https://mabrains.com

Integer Digitall PLL + LDO + Bandgap + Error Amplifier Design

EAMTA 2021 projects public


Collection of student's projects developed in the Argentine School of Micro-Nanoelectronics,...

EE272B test project public

Daniel Stanley

I don't intend to tape this out, but I am mentoring some other projects and would like to go...

FABulous Sky public

Nguyen Dao

Demonstration of the Fabulous FPGA design flow using the Skywater 130 process. The design...

Fast GCD for... public

Kavya Sreedhar

Computes the Bezout coefficients associated with 1024 bit numbers with a GCD of 1.

FuseRISC public

Andy Attwood | https://github.com/andrewattwood/fuserisc.git

FuseRISC will demonstrate the benefits of the tight coupling of RISC-V cores and eFPGA fabric...

Gbps SerDes public

Jingxiao Li

Doing a wire line serial communication gbps transceiver

General_Purpose_B... public

Anmol Purty | https://www.vlsisystemdesign.com/

A General Purpose Bandgap Reference IP block that generates constant voltage at output, which is...

HS32Core public

Kevin Baragona | https://github.com/hsc-latte

Open Source Hardware Processor

Hilas Analog... public

Barry Muldrey | https://gitlab.com/um-ece/ftl-lab/hilas

Analog std cells and test structures for audio processing and analog computing

Ibtida SoC public

Muhammad Hadir Khan | https://merledupk.org

System on a Chip built around a RISC-V based 5 stage pipelined core Buraq-Mini.

Kasirgalabs UART public

Iremnur Colak | https://www.kasirgalabs.com/en/

Simple UART controller

Lexicon public


This Is A Machine-Mode (M-Mode) Only, 32-Bit Cpu Small Core Which Supports Risc-V’s Integer (I),...

Libre-SOC Crypto-Router public

lkcl | http://libre-soc.org

Libre-SOC is an entirely Libre-licensed SoC based on the OpenPOWER v3.0 ISA. Layout is in...

Microwatt public

Anton Blanchard | http://ibm.com

Microwatt 64 bit OpenPOWER core

Noise-Shaping TDC public

Victor PM

High-resolution time-to-digital converter (TDC) for accurate time measurement, applicable to...

Open PMIC public

Weston Braun

A current mode buck converter with an analog controller to derive the 1.8V logic voltage from...

Opencryo_testchip public

Francisco Brito Filho

NMOS and PMOS array, ring oscillator and inductor for cryogenic characterization.

OsciBear public

Dan Fritchman

Berkeley student-designed wireless SoC, featuring a RISC-V Rocket processor, hardware AES...

Potentiometric_Di... public

skandha deepsita | https://www.vlsisystemdesign.com/

The project aims to design a 10-bit Potentiometric Digital to Analog Converter(DAC). The target...

RenML public

Tayyeb Mahmood | https://www.renzym.com/

A small, Convolutional Neural Network Accelerator on a wishbone slave for Raven Core in Caravel SoC.

SHA1 engine public

Konrad Rzeszutek Wilk

The SHA1 engine, while not the most secure nowadays is still used by git commits and TPM PCR...

SOFA Plus FPGA public

Xifan TANG | https://github.com/lnis-uofu/SOFA.git

SOFA (Skywater Opensource FPGAs) are a series of open-source FPGA IPs using the open-source...

Softshell public

Harrison Pham | https://harrisonpham.com/

Multicore MCU for implementing software defined peripherals.

Space_Shuttle public

Iván Rodríguez Ferrández | https://www.bsc.es

The main goal of this project is to assess the reliability of the SkyWater 130nm manufacturing...

Spectravel public

Vladimir Milovanović | www.novelic.com

A digital spectrometer SoC consisting of the SDF-FFT and its support circuitry.

Subservient public

Klas Nordmark

ASIC adaption of SERV, the award-winning bit serial RISC-V processor.

Subservient SOC public

Priyanka Dutta

SERV is a bit-serial CPU which means that the internal datapath is one bit wide and it is the...

Test Chip 0 -... public

Russell Friesenhahn | https://www.utexas.edu/

This project demonstrates a butterfly for an FFT with options to receive data from an external...

UCSC OpenRAM Test Chip public

Matthew Guthaus | https://vlsida.soe.ucsc.edu

Test chip for single and dual port memories created by OpenRAM.

VCO-Based-ADC public

Duy-Hieu Bui | http://uet.vnu.edu.vn/~hieubd

This project implements a VCO-Based ADC on skywater 130nm for IoT. This is a sigma-delta ADC...

VSD SRAM public

Shon Taware | https://vlsisystemdesign.com/

Design of SRAM cell array with a configuration of 1.8 V operating voltage using Google SkyWater...

Wishbone CAN public

Zachary Ellis

An implementation of a CAN bus controller as a wishbone peripheral for the open MPW shuttle

YONGA-LZ4 Decoder public

Abdullah YILDIZ | https://yongatek.com/

YONGA-LZ4 Decoder Is An Implementation Of The Decoder Of The Popular Lz4 Compression Algorithm.

YiFive (Risc V Based... public


32 Bit Risc SOC Design with Quad SPI , 8 bit SDRAM Controller and UART

azadi_soc_ibex public

Zeeshan Rafique | https://www.linkedin.com/company/merluit

Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it "buraq",...

caravel_analog_fulgor public

Diego Joaquín Hernando | http://www.fundacionfulgor.org.ar/sitio/index.php

Analog test chip with master's thesis prototypes: - 1GHz Current Starved VCO - Residual...

caravel_dsc public

Baburaj Thillaigovindan

Caravel Harness based Digital Signal Controller for Embedded Control applications , the user...

caravel_dsp2 public

Jayakumar J

DSP Functions

clusterv_soc_mpw2 public

Matthew Ballance

Quad-core RISC-V SoC with on-chip memory and peripherals

darkriscv in openlane public


The project is a realization of darkriscv processor using openlane and skywater pdk. It has a...

dummt public

wajeh ul hasan


io_expander public

Siva Prasad

A gpio expander for the caravel harness to realize a small microcontroller

multi project harness public

Matt Venn

multi project harness

multi project harness... public

Matt Venn

saves space on the shuttle by aggregating up to 16 designs in one submission

phy_test public


open source phy

pre_check_debug_w... public



sermo-soc public

Tayyeb Mahmood | https://www.uet.edu.pk/

An industrial motor control SoC for sensored DC servos and sensorless AC FoC applications. Sermo...

space_shuttle public

Ahmad Nofal

small summary never hurts

sram_abstraction_trial_1 public

Ahmad Nofal

just a trial

uqab public

Waleed Waseem

uqab is an SoC.

vlsi-sky130-analo... public

Mariano Alvira

First try at open mpw: simple analog circuits