All Public Projects

Filter: SSCS-21 | 2106Q | 2110C | MPW-1 | MPW-2 | MPW-3 | MPW-4

249 results

10_bit_potentiometric_DAC public

Sameer Durgoji | https://www.vlsisystemdesign.com/

Design of a 10 Bit Potentiometric Digital to Analog Converter with 3.3V analog voltage, 1.8V...

1111 public


private test project

1kb 7T SRAM 8x4... public

Yashaswi Lakku

A novel basic Low-power 7T SRAM cell, designed and utilized in designing an efficient 1kb SRAM...

1V8 LDO Design... public

Amro Tork | https://mabrains.com

1V8 LDO Design in Skywaters 130nm

4x8 CGRA Prototype public

Po-Han Chen

A coarse grained reconfigurable array that enables hardware acceleration for applications...

8 bit Priority Encoder public

uppala bhargavasai

In this project,We gave 8 bits as input and we get back 3 bits as output based on priority .The...

8-bit SAR-ADC... public


This is a Analog to Digital Converter based on the popular SAR architecture. It has 8-bit...

8x_PLL_Clock_Multiplier public

Subham Mohapatra | https://www.vlsisystemdesign.com/

8x PLL Clock Multiplier. Input frequency ranges from 5MHz to 12MHz and output frequency is from...

9 stages ring oscilator public

Vilmondes Ribeiro | http://www.ufu.br/

This is a ring oscilator made with 9 stages of CMOS inverters.

AFTx06_Caravel public

John Martinuk | https://engineering.purdue.edu/SoC-Team/about

Purdue's University's Socet Undergraduate Team Creates Soc's, Aimed To Be Integrated Into Low...

Alperens SOC public

Alperen Bolat

Custom Risc V processor design

A Modified 8 bit... public


Dadda multiplier is a type of binary multiplier which uses less munber of gates when compared to...

Amsat TXRX IC MPW2 public

Thomas Parry | https://github.com/yrrapt/amsat_txrx_ic

This step in the development and prototyping of the Amateur Radio Satellite Transceiver project...

Analog Neuron public

Lakshmi S

Analog implementation of the artificial Neuron used in neural networks. Implements the network...

Analog_RF_MPW public

Affan Abbasi | https://www.linkedin.com/in/affanabbasi/

Analog & RF designs

Analog Seizure... public

Joseph S. Friedman | https://txace.utdallas.edu/

Analog feature extraction of EEG data and data fusion via stochastic computing for implantable...

Approximate Multiplier public

skandha deepsita

This project is implementation of approximate multiplier published in ACM TODAES journal 2021,...

A-QRNG public

Rodrigo Nogueira Wuerdig | https://www.inf.pucrs.br/~gaph/

The A-QRNG is a fully open-source quasi-random number generator designed at the Pontifical...

ArmleoPC public

Arman Avetisyan

ArmleoPC is a System-on-Chip integrating ArmleoCPU dual core RV32IMA CPU capable of booting...

AutomaticStandard... public

Philipp Gühring | https://libresilicon.com/

At Libresilicon we have been working for several years on making chipdesign and production...

AXI DMA using Spinal... public

Pu Wang

This is a DMA controller with AMBA AXI4 interface. This DMA controller is part of an ongoing...

Azadi_II public

Sajjad Ahmed | https://github.com/merledu

Azadi-II is the extended version of AzadiI which is an SoC based on RISCV RV32IMCF architecture....

azadi_soc_ibex public

Zeeshan Rafique | https://www.linkedin.com/company/merluit

Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it "buraq",...

Backscattering... public

hamza atiq | http://isb.nu.edu.pk/rfcs2/

The project focuses on the implementation of Passive Backscattering for on-chip Wireless Power...

Bandgap Reference public

Hisham Elreedy

Design of bandgap reference circuit which can be used as building block for power management ICs

Bandgap_Reference_Design public

Swarup Pulujkar | https://www.vlsisystemdesign.com

A Bandgap Reference Circuit To Generate A Constant Voltage Output That Is Insensitive To...

BrqRV_EB1 public

hamza shabbir

BrqRV EB1 is a machine-mode (M-mode) only, 32-bit CPU small core which supports RISC-V’s integer...

Caravel public

Sylvain Munaut | https://github.com/PyFive-RISC-V

Peripherals tests for future SoC targeting Micro/Circuit Python

Caravel public

Arya Reais-Parsi | http://efabless.com

A template SoC for Google sponsored Open MPW shuttles for SKY130.

Caravel public


A template SoC for Google sponsored Open MPW shuttles for SKY130

Caravel public

LOESTER FRANCO BOTELHO | http://efabless.com

A template SoC for Google sponsored Open MPW shuttles for SKY130.

Caravel public

Mohamed Shalan, Ph.D. | http://efabless.com

NFive32-Based SoC to validate several open-source projects and IPs.

Caravel public

Michael Stetzler

A 10 bit DAC and an analog neural network neuron.

Caravel-AES128 public

Michael Gielda | https://antmicro.com

A template SoC for Google sponsored Open MPW shuttles for SKY130.

caravel_amsat_txrx_ic public

Thomas Parry | N/A

Amatuer Radio Satellite Transceiver (SKY130) - Caravel Submission

caravel_analog_fulgor public

Diego Joaquín Hernando | http://www.fundacionfulgor.org.ar/sitio/index.php

Analog test chip with master's thesis prototypes: - 1GHz Current Starved VCO - Residual...

Caravel_Astria_Testchip public

Astria Nur Irfansyah | http://www.its.ac.id

Test circuits consisting of synthesizable comparators for a stochastic ADC, to be submitted for...

caravel_dsc public

Baburaj Thillaigovindan

Caravel Harness based Digital Signal Controller for Embedded Control applications , the user...

caravel_dsp public

Jayakumar J

DSP Functions

caravel_dsp2 public

Jayakumar J

DSP Functions

Caravel_EL2_SoC public

Jeff DiCorpo

A template SoC for Google sponsored Open MPW shuttles for SKY130.

Caravel_Fault_SPM public

Jeff DiCorpo

The repo contains SPM with DFT structure integrating with the Caravel chip. For the SPM/DFT...

Caravel_FPU public

komaljaved-lm | https://lampromellon.com/

Caravel_FPU integrates floating point unit with Caravel Core. It is capable of doing floating...

caravel_fulgor_opamp public

Diego Joaquín Hernando | http://www.fundacionfulgor.org.ar/sitio/index.php

Operational amplifier (opamp) based on the Miller topology designed in Skywater SKY130 CMOS process.

Caravel HyperRAM... public

Paweł Sitarz

Project instantiates HyperRAM driver for external memory chip (8MB version) and additional...

caravel_jacaranda-8 public

Heppoko | https://cpu-dev.github.io/

PicoRV & Jacaranda-8 - It's a hobby heterogeneous processor!

Caravel_Multi_encoder public

Manikandan Nagarajan

Multi purpose integrated encoder

Caravel_Multi_encoder-v1 public

Manikandan Nagarajan

Multipurpose integrated encoder

Caravel-OpenFPGA-EF public

Manar Abdelatty | http://efabless.com

A template SoC for Google sponsored Open MPW shuttles for SKY130.

caravel_periphera... public

Siva Prasad

A attempt to integrate various peripherals like I2C, I2S, UART, SPI, QSPI , JTAG, PWM, GPIO ,...

Caravel Plus public

Mohamed Shalan, Ph.D. | http://efabless.com

Caravel management SoC attached to the largest possible SRAM that can fit the user's area.

Caravel Priority Encoder public

Mohammad Khalique Khan | https://www.vlsisystemdesign.com/

This project produced a clean GDSII Layout with all details that are used to print photomasks...

Caravel-QLSOFA-HD public

K.C. Yap | https://sites.google.com/site/pegaillardon/home

QLSOFA-HD (Skywater Opensource FPGAs)

Caravel_RISCV_OSU public

James Stine | https://vlsiarch.ecen.okstate.edu/

Caravel_RISCV_OSU is an implementation of a single-cycle RISC-V processor inside of the Caravel...

Caravel-Sermo public

Department of Electrical Engineering UET Lahore | https://uet.edu.pk/

The project implements a PID controller using encoder feedback and single channel of PWM output...

Caravel_sha3_256_... public

Jean Cyr | http://jeancyr.com

SHA-3 cryptomining SoC for Google sponsored Open MPW shuttles for SKY130.

Caravel-SOFA-CHD public

Xifan TANG | https://sites.google.com/site/pegaillardon/home

SOFA-CHD (Skywater Opensource FPGAs)

Caravel-SOFA-HD public

Xifan TANG | https://sites.google.com/site/pegaillardon/home

SOFA-HD (Skywater Opensource FPGAs)

Caravel SRAM Test public


The project instantiates an SRAM block in the user project area for testing.

Chameleon SoC public

Mohamed Shalan, Ph.D. | http://efabless.com

AHB-Lite based SoC for IBEX

Chaos Automaton public

Tim Edwards | http://opencircuitdesign.com

Asynchronous automaton with evolvable edge-of-chaos behavior

Class-D Audio Amplifier public

Hongzhe Jiang

This project is intended to implement a closed-loop class-d audio amplifier with 1.8 V power...

clusterv_soc_mpw2 public

Matthew Ballance

Quad-core RISC-V SoC with on-chip memory and peripherals

CMOS photodetectors public

Seyedali Hosseini

Five photodetector layout by sky130 PDK 1. Simple p-n photodiode. 2. Buried double junction...

Columbus public

Tom Stanway-Mayers

Analog Test Chip Consisting of the following: LDO, Load Switch, Bandgap Reference, and an OpAmp

Comparator and... public


3v3 comparator with 1v8 output. For possible future uses in ADCs. May also include other related...

Comparator VCO... public

Malay Das | https://www.vlsisystemdesign.com/

Comparator at 3v3 Supply Voltage Voltage Controlled Oscillator with 7 stage ring oscillator...

Coriolis Test SoC public


Test SoC using Coriolis for PnR with nMigen on Sky130

crypto-accelerator-chip public

Anish Singhani

ASIC containing a combined AES128/256 accelerator core and a VGA graphics/game demo

Crypto Accelerator v2 public

Anish Singhani

SHA/AES accelerator and VGA graphics demo

Cryptochip public

Kylee Krzanich

Cryotochip is a RISC-V SoC tightly coupled with several cryptographic accelerators including a...

Current Starved... public

S.Nalin Kumar | https://www.vlsisystemdesign.com/

This project focuses on design of a Current Starved VCO using Google Skywater (sky130)...

Customized SERDES public

Syed Muhammad Sarmad

Customized SERDES with selectable Serial protocol

DAC for... public

Barria Nine | http://www.neural-semiconductor.com/

This proposal states a particular idea for implementing a Digital to Analog Converter (DAC)...

darkriscv in openlane public


The project is a realization of darkriscv processor using openlane and skywater pdk. It has a...

DeepSAC for... public

Omiya Hassan | https://engineering.missouri.edu/academics/eecs/eecs-research/vlsi-lab/

Our ultimate goal is to design a smart and wearable sleep apnea detection system capable of...

DEISGN OF N-BIT... public

rohith sai

Approximate computing, also called imprecise or inaccurate computing, is a potential ...

Demo public

Shivani Shah

Hello world!

Design and build... public

Runkun Li

We plan to design and build an audio-band ADC based on the tri-level CTDSM using negative-R...

Design and... public

hemanthlakshmiphanipr k | http://www.vnrvjiet.ac.in/

In today’s world, the development of Millimetre-wave technology has been accelerated for...

Design of a GPS... public

Ramakrishna P.V.

The present project would design a custom GPS Baseband Engine (digital ASIC portion) which, in...

Dickson Charge Pump public

Charaan SureshKumar | https://www.vlsisystemdesign.com/

This project focuses on the design and layout of a Dickson Charge Pump in a 130nm technology...

DIGITALLY... public

Hugo Dias | https://ufersa.edu.br/

The proposed circuit is a Digitally Programmable Gain Amplifier (DVGA) which will work...

digital phase... public

Mangalapally Naveen

Our project is mainly based on the phase and frequency difference detection between I/O digital...

Digital PLL public

Amro Tork | https://mabrains.com

Integer Digitall PLL + LDO + Bandgap + Error Amplifier Design

Donkey Kong... public

Nick Smith

ASIC designed to translate input from the Donkey Kong Jungle Beat bongos into PS2 keystrokes.

DSP48 DAC public

Bittu N | none

A very simple design for the first SKY130 shuttle.

dummt public

wajeh ul hasan


DVSoC public

Dilip Vasudevan


EAMTA 2021 projects public


Collection of student's projects developed in the Argentine School of Micro-Nanoelectronics,...

EE272B test project public

Daniel Stanley

I don't intend to tape this out, but I am mentoring some other projects and would like to go...

Efabless processor public

Andrew Feldman

Basic design to familiarize with this service

eFPGA_v3 public

Nguyen Dao

Demonstration of the Fabulous FPGA design flow using the Skywater 130 process. This project...

Elpis Light processor public

Aurora Tomás Berjaga

This project is a light version of the Elpis core, which is a 5-stage pipelined and multi-cycle...

EX1-VLSI public

Felipe Aragão

First layout project on VLSI course.

FABulous Sky public

Nguyen Dao

Demonstration of the Fabulous FPGA design flow using the Skywater 130 process. The design...

Fast GCD for... public

Kavya Sreedhar

Computes the Bezout coefficients associated with 1024 bit numbers with a GCD of 1.

Fast Start-Up... public

Daaris Ameen

This proposal presents a theoretical study and design of two techniques used to reduce start-up...

Fixed2Float_Converter public

Dhayalakumar Maruthamuthu

This project is implementation for conversion of 19bit fixed point number to single precision...

FuseRISC public

Andy Attwood | https://github.com/andrewattwood/fuserisc.git

FuseRISC will demonstrate the benefits of the tight coupling of RISC-V cores and eFPGA fabric...

FWPayload public

Matthew Ballance | http://github.com/mballance

A simple RISC-V core+peripherals subsystem for the Google-sponsored Open MPW shuttles for SKY130.

Gbps SerDes public

Jingxiao Li

Doing a wire line serial communication gbps transceiver

General_Purpose_B... public

Anmol Purty | https://www.vlsisystemdesign.com/

A General Purpose Bandgap Reference IP block that generates constant voltage at output, which is...

Ghazi SoC public

Zain Khan | http://merledupk.org

An SoC (System on a Chip) design for Google sponsored Open MPW shuttles for SKY130.

Ghazi SoC II public

Zain Khan

An implementation of the original Ghazi SoC (https://efabless.com/projects/20) hardened using...

Harvest... public

Nhan To To

A highly efficient energy converter to harvest thermoelectric energy uses MPPT and ZCS.

High DC Gain... public

Alper Kurt

A single ended folded cascode which has a high DC gain (>70 dB) will be designed for LDO or...

High-Gain TIA... public

Jared Marchant

Our design is a high-gain, low-noise, resistive feedback transimpedance amplifier applicable to...

High Speed Adder public

Dhayalakumar Maruthamuthu

This projects aims to design an high speed adder based on recursive doubling technique and...

Hilas Analog... public

Barry Muldrey | https://gitlab.com/um-ece/ftl-lab/hilas

Analog std cells and test structures for audio processing and analog computing

HS32Core public

Kevin Baragona | https://github.com/hsc-latte

Open Source Hardware Processor

Ibtida_II public

Zeeshan Rafique

This submission is for Ibtida-I which was selected for the First MPW Shuttle. Due to the issues...

Ibtida SoC public

Muhammad Hadir Khan | https://merledupk.org

System on a Chip built around a RISC-V based 5 stage pipelined core Buraq-Mini.

ieee sscs pico chip... public

Hisham Elreedy

online precheck for ieee sscs pico chip 5 of sscs21


Prajna Mangeshkar

This project mainly performs the full ASIC implementation of the design from RTL to GDSII....


Rutuja Kage

The design flow performs the full ASIC implementation of the design from RTL to GDSII. The...

Inductor Less... public

Rana Muhammad | http://isb.nu.edu.pk/rfcs2/

This is a proposal for IEEE PICO design contest. An inductor less 5G Bi-Directional amplifier...

In-Memory... public

Zhiyang Ong | https://github.com/eda-ricercatore

Many types of hardware accelerators for machine learning have been proposed, such as those based...

io_expander public

Siva Prasad

A gpio expander for the caravel harness to realize a small microcontroller

Kasirgalabs UART public

Iremnur Colak | https://www.kasirgalabs.com/en/

Simple UART controller

Key Value store public

Giray Pultar

Key value store implemented on asic.

Lea_Project_Public public


Picking up where Lea left off

Lexicon public


This Is A Machine-Mode (M-Mode) Only, 32-Bit Cpu Small Core Which Supports Risc-V’s Integer (I),...

Lexicon_SoC public

Marium Masood

This project aims to convert the SweRV-EL2 Core Complex into SoC by adding peripherals around...

Libre-SOC Crypto-Router public

lkcl | http://libre-soc.org

Libre-SOC is an entirely Libre-licensed SoC based on the OpenPOWER v3.0 ISA. Layout is in...

linsorter public

Vladimir Milovanović | elektrotehnika.github.io

A digital linear insertion sorter accelerator.

Logic BIST public


Logic BIST with Scan Chain to detect struck at fault

Low Cost DC-DC... public

Nayeeb Rashid

The objective of this project is to develop a simple, low cost, energy-efficient LED driver chip...

Low Power... public


The proposed ADC is pipelined and mainly consists of three stages: 1) Track-and-hold...

Low Voltage CMOS... public

Mutyala Likhitha

Basically, An integrated circuit should work at all temperature regions, so a reference voltage...

Low Voltage High... public

Uttam Sahu

Low Voltage High PSRR Band Gap Reference Circuit with design focus on improving noise...

Machine Learning... public

Zhiyang Ong | https://github.com/eda-ricercatore

We implement a series of in-memory computing designs for machine learning, using SRAMs (based on...

MAC unit for... public

Shaheer Sajid

We aim to add an integer MAC to RISCV processors to accelerate convolution. The compiler will be...

mahmut_coban_delt... public

Mahmut ÇOBAN

As a project, I pick the Discrete Delta-Sigma Modulator (DC DSM). The main objective is to...

MBIST Controller public


MBIST controller with Row Redundancy Support

microcontroller_sensors public

Omar Mohamed Saadawy

Voltmeter & Ammeter

Microwatt public

Anton Blanchard | http://ibm.com

Microwatt 64 bit OpenPOWER core

MorphleLogic public

Merik Aart Voswinkel | http://www.fiberhood.org

A test-wafer for testing Mophle Logic reconfigurable hardware for SKY130.

MultiplicationDiv... public

Zeeshan Rafique | https://github.com/merledu

This project is aimed to design an ASIC version of Multiplication and Division Unit that can be...

multi project harness public

Matt Venn

multi project harness

multi project harness... public

Matt Venn

saves space on the shuttle by aggregating up to 16 designs in one submission

My_Proj public

Karthi Keyan


NibbleALU public


This is a 4 bit ALU capable of performing addition, subtraction, multiplication, Bitwise AND,...

Noise-Shaping TDC public

Victor PM

High-resolution time-to-digital converter (TDC) for accurate time measurement, applicable to...

Novel Flicker... public

Jyotindra Shakya

A novel flicker noise cancellation scheme is proposed, where bias current instead of input is...

Opencryo_testchip public

Francisco Brito Filho

NMOS and PMOS array, ring oscillator and inductor for cryogenic characterization.

OpenFASOC public

Mehdi Saligane

This testchip is a demonstrator of our automated analog generators within an SoC implementation....

Open PMIC public

Weston Braun

A current mode buck converter with an analog controller to derive the 1.8V logic voltage from...

Open PMIC V1 public

Weston Braun

A current mode buck converter

OpenRAM test public

Matt Venn

OpenRAM test

open source phy_2106Q public


high-speed PHY

OpenTDC public

Tristan Gingold

Time to Data Converter with Fine Delay

OsciBear public

Dan Fritchman

Berkeley student-designed wireless SoC, featuring a RISC-V Rocket processor, hardware AES...

OsciBearIgnite public

Dan Fritchman | https://github.com/ucberkeley-ee290c

Berkeley student-designed wireless SoC, featuring a RISC-V Rocket processor, hardware AES...

Oscillator based... public

Vinodhini G. Edward

This project aims at designing an Oscillator based read-out circuit for LVDT using time domain...

Philip Rowse public


vote logic

Photodetectors public

Carlos German Carreño Romano | http://fi.uba.ar/

In this project it is proposed to research, design, manufacture and experimentally validate CMOS...

picorF0 public

Anish Singhani

CAN bus controller and teaching-oriented CPU core

Poly-Silicon... public


Polysilicon resistor based temperature sensor and its read out electronics

Potentiometric_10bit_DAC public

Sameer Durgoji | https://www.vlsisystemdesign.com/

Design of a 10 Bit Potentiometric Digital to Analog Converter with 3.3V analog voltage, 1.8V...

Potentiometric_Di... public

skandha deepsita | https://www.vlsisystemdesign.com/

The project aims to design a 10-bit Potentiometric Digital to Analog Converter(DAC). The target...

Pre-Trained... public


This project implements a pre-trained neural network for hand-written digits from MNIST dataset.

Project_VCO public


A high-performance VCRO, with a wide tuning range and noise suppression.

PWM_Test public

Karthi Keyan


q-rib public

Dimitri del Marmol | https://github.com/0x01be

A template SoC for Google sponsored Open MPW shuttles for SKY130.

Randsack public

Harrison Pham

Random number generators, PUFs, and resubmission of MPW-1 Softshell.

rapcores public

Steve Kelly | http://rapcores.org

RAPcore motor and motion controller on the Google sponsored Open MPW shuttles for SKY130.

Reconfigurable... public

Muhammad Ahmed Mansoor

An SoC with hard blocks for common UAV flight control features and a reconfigurable fabric for...

RenML public

Tayyeb Mahmood | https://www.renzym.com/

A small, Convolutional Neural Network Accelerator on a wishbone slave for Raven Core in Caravel SoC.

REST public

Sajjad Ahmed

Resource efficient sram based tcam

RF_IQ_Upconverter... public

Michael Stetzler

Upconverter/Downconverter with integrated with image rejection, RF gain stage, and LO chain that...

riscduino public


Arduino compatible Risc-V Based SOC

RISC-V Bare Minimum... public

Prabhat Narang

MCus today have become so general-purpose, that they incorporate many IP modules (Like multiple...

RISC-V Bare... public

Prabhat Narang

MCus today have become so general-purpose, that they incorporate many IP modules (Like multiple...



This is a BOOM RISC-V OoO Core SoC.

ROTFPGA public


A reconfigurable logic circuit made of identical rotatable tiles.

RT-PseudoRNG public

Álvaro Jover Álvarez | https://www.upc.edu/en

A pseudo random number generator oriented towards random cache placement and replacement for...

Serializer public

A Devipriya | https://www.vlsisystemdesign.com/

This project produces a clean GDS - Final Layout with all details that are used to print...

Serial RISC V (SERV) public

R.Thanga Gnana Jenef

SERV is a bit-serial CPU which means that the internal datapath is one bit wide. . For each...

Serial RISCV (SERV) public

John Samuel

SERV is a Bit Serial RISCV CPU Processor

sermo-soc public

Tayyeb Mahmood | https://www.uet.edu.pk/

An industrial motor control SoC for sensored DC servos and sensorless AC FoC applications. Sermo...

SHA1 engine public

Konrad Rzeszutek Wilk

The SHA1 engine, while not the most secure nowadays is still used by git commits and TPM PCR...

SIC LNA for 5G and beyond public

Hamza Saleem | http://isb.nu.edu.pk/rfcs2/

Self-Interference cancellation is the core problem in In-band Full-duplex radios in 5G. This new...

Single... public

Nikhil Garg

https://gitlab.com/um-ece/ftl-lab/hilas/designs/alice.git This Skywater 130nm implementation...

skylar-soc public


This project implements a RISC-V SOC with hardware accelerators modules on skywater 130nm.

Skywater 130 Decred... public

Matt Aamold

Decred implementation of blake256r14 cryptomining SoC for Google sponsored Open MPW shuttles for SKY130.

SoC Now public

Shahzaib Kashif

An open source Mini SoC Generator which will generate SoC based on parameters.

SOFA Plus FPGA public

Xifan TANG | https://github.com/lnis-uofu/SOFA.git

SOFA (Skywater Opensource FPGAs) are a series of open-source FPGA IPs using the open-source...

Softshell public

Harrison Pham | https://harrisonpham.com/

Multicore MCU for implementing software defined peripherals.

Sonar on Chip public

Mauricio Alejandro Montanares Sepúlveda

The project is oriented to implement a multichannel signal path for ultrasonic air-coupled sonar...

space_shuttle public

Ahmad Nofal

small summary never hurts

Space_Shuttle public

Iván Rodríguez Ferrández | https://www.bsc.es

The main goal of this project is to assess the reliability of the SkyWater 130nm manufacturing...

Spectravel public

Vladimir Milovanović | www.novelic.com

A digital spectrometer SoC consisting of the SDF-FFT and its support circuitry.

sram_abstraction_trial_1 public

Ahmad Nofal

just a trial

SRAM_based_TCAM public

Ali Ahmed, Ph.D. | https://github.com/merledu

This project is tied as an accelerator to the management SoC. It mimic the functionality of TCAM...

sscs-demo-2 public

Jeff DiCorpo

Demo project

SSCS PICO Chip 1 public

hamza atiq | http://isb.nu.edu.pk/rfcs2/

This submission is a merger of the following SSCS PICO...

SSCS PICO Chip2 public

Ramakrishna P.V.

This submission is a merger of the following SSCS PICO projects: 1....

SSCS Pico Chip 3 public

Luís Henrique Rodovalho Moreira de Lima

SSCS Pico Chip with an Analog Front End for Biosignals, Digitally Programmable Gain Amplifier,...

SSCS PICO Chip 4 public

Jared Marchant

https://efabless.com/projects/342 https://efabless.com/projects/340 https://efabless.com/projects/312

SSCS PICO Chip 5 public

Omiya Hassan

This submission is a merger of the following SSCS PICO Projects. 1. DeepSAC for Sleep apnea...

SSCS PICO Chip 6 public

Mauricio Alejandro Montanares Sepúlveda

The project is oriented to implement a multichannel signal path for ultrasonic air-coupled sonar...

SSCS PICO Chip 7 public

Nikhil Garg

This Skywater 130nm implementation project will build a programmable end-to-end...

Standalone... public

John Kustin

An educational bandgap reference circuit using a 1.8v supply based on the Banba...

Stanford... public

John Kustin

A Bandgap Reference Circuit Based On The Banba Architecture Made For Stanford's Ee272b: Design...

StdCellLib public

Philipp Gühring | https://libresilicon.com/

This is a testwafer project with standard cells that were automatically generated by the...

sub_ps_two_step_TDC public

Stephen Wenlan Wu

A linear time difference amplifier was used to improve the TDC resolution

Subservient public

Klas Nordmark

ASIC adaption of SERV, the award-winning bit serial RISC-V processor.

Subservient SOC public

Priyanka Dutta

SERV is a bit-serial CPU which means that the internal datapath is one bit wide and it is the...

Sudoku Accelerator public

Andrea Nall

Sudoku accelerator module that is capable of running an 'only candidate' pass in 23 cycles and a...

Sziklai Pair Amplifier public

SUMANTO KAR | https://www.vlsisystemdesign.com/

This project focuses on design of a Sziklai Pair Amplifier using Google Skywater (sky130)...

Telluride... public

andreoulab chips | http://andreoulab.net

An auditory perception acoustic front end with multi-channel capability and standard digital...

test111 public

Michael Irsch


Test Chip 0 -... public

Russell Friesenhahn | https://www.utexas.edu/

This project demonstrates a butterfly for an FFT with options to receive data from an external...

Thermoelectric... public

Khoa Pham | http://en.hcmute.edu.vn/

Self-power technique is a vital key for stand-alone applications whereas battery replacement may...

TIDENet- TinyML... public

Cole Blackman | https://engineering.virginia.edu/high-performance-low-power

TinyML Image Detection on the Edge with neural Networks, or TIDENet, is an ASIC written in...

ToolTest gpioCtrl public

iDPro-github | https://www.idpro-online.de

Digital test design with simple GPIO control for toolchain testing

TP1 public

Felipe A. N. de Freitas

This project is related to the first ex. of UFMG/VLSI course under prof. Dalton Colombo mentoring. ...

TreePRAM public


Implements a version of the parallel random-access machine used in theoretical computer science...

TreePRAM-red public


Reduced version of TreePRAM for faster builds and tests. Not submitting for the shuttle.

trig functions... public

Usman Siddique

This project discusses the design and implementation of a trigonometric functions and identities...

Two Stage CMOS... public

Madhuri Kadam | http://www.vlsisystemdesign.com/

CMOS OPAMP is Basic building block of analog and Mixed signal circuits. It is used in many...

Two Stage CMOS... public

ROHINTH RAM R.V. | https://www.vlsisystemdesign.com/

Two Stage CMOS Operational Amplifier

UCSC OpenRAM Test Chip public

Matthew Guthaus | https://vlsida.soe.ucsc.edu

Test chip for single and dual port memories created by OpenRAM.

UCSC OpenRAM Test Chip... public

Matthew Guthaus | https://vlsida.soe.ucsc.edu/

This project contains a test chip for several OpenRAM memory configurations. The configurations...

Ultra-Low-Power... public

Luís Henrique Rodovalho Moreira de Lima | https://ufsc.br/

This design contains an analog signal process block that filters DC inputs, amplifies the AC...

uqab public

Waleed Waseem

uqab is an SoC.

Variable-gain PA... public

Leonardo Amorese Gallo Gomes | https://sites.usp.br/centrommw/

A variable-gain power amplifier to accomplish two specific tasks: compensate for the insertion...

VARIABLE... public

Muhammad Usman | http://isb.nu.edu.pk/rfcs2/

This design implements variable precision floating point fused multiply and add (FMA )unit...

VCO-based ADC public

Duy-Hieu Bui | http://iti.vnu.edu.vn/

This project implements a VCO-Based ADC on skywater 130nm for IoT. This is a sigma-delta ADC...

VCO-Based-ADC public

Duy-Hieu Bui | http://uet.vnu.edu.vn/~hieubd

This project implements a VCO-Based ADC on skywater 130nm for IoT. This is a sigma-delta ADC...

vdp-lite public

Dan Rodrigues | https://github.com/dan-rodrigues

VGA sprite generator for the SKY130 Open MPW shuttles.

vlsi1 public

Lucas Mourão Ferreira

VLSI exercise

vlsi-sky130-analo... public

Mariano Alvira

First try at open mpw: simple analog circuits

VSDBabySoC public

Mufutau Akuruyejo | httpS://WWW.vlsisystemdesign.com

VSDBabySoC is a small SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.

VSDMemSoC public

Mufutau Akuruyejo

VSDMemSoC is a small SoC including a RISCV-based processor named RVMYTH and an external 1kB SRAM...

VSD SRAM public

Shon Taware | https://vlsisystemdesign.com/

Aims at design of a SRAM cell array with a configuration of 1.8 V operating voltage and access...

VSD SRAM MPW2 public

Shon Taware | https://vlsisystemdesign.com/

Design of SRAM cell array with a configuration of 1.8 V operating voltage using Google SkyWater...

Wakey Wakey public

Jhoneldrick Millares

Reconfigurable Wake Word Accelerator

Wishbone CAN public

Zachary Ellis

An implementation of a CAN bus controller as a wishbone peripheral for the open MPW shuttle

XOR Physical... public

Anh Phan

This project develops XOR Physical Unclonable Function (XOR PUF) module based on Skywater 130nm

yifive_a1 public

Manikantasai2 | https://univisiontechnocon.com/

RISC-V Core Based Subsystem

yifive_a2 public

Manikantasai2 | https://univisiontechnocon.com/

RISC-V based sub system

YiFive (Risc V Based... public


32 Bit Risc SOC Design with Quad SPI , 8 bit SDRAM Controller , UART, I2C Master and USB 1.1 Host

YiFive (Risc V Based... public


32 Bit RiscC Soc Design With Quad Spi , 8 Bit SDRAM Controller And UART

YONGA-100M Ethernet public

Abdullah YILDIZ | https://yongatek.com/

YONGA-100M Ethernet is based on the implementation of Alex Forencich's 100Mbps Ethernet design.

YONGA-LZ4 Decoder public

Abdullah YILDIZ | https://yongatek.com/

YONGA-LZ4 Decoder Is An Implementation Of The Decoder Of The Popular Lz4 Compression Algorithm.

YONGA-SERV Accelerator public

Abdullah YILDIZ | https://yongatek.com/

YONGA-SERV Accelerator includes the award-winning SERV RISC-V processor with a matrix...

Zero to ASIC... public

Matt Venn | https://www.zerotoasiccourse.com

MPW3 submission