Logo

A Modified 8 bit...

public

If you are collaborating on this project, please click here to access your collaboration files, and click "Accept Share" in the actions column if you haven't done so already.

Owner

KarthikMB

Summary

Dadda multiplier is a type of binary multiplier which uses less munber of gates when compared to Wallace tree multipliers. A conventional Dadda multiplier uses a selection of half and full adders to sum the partial product in stages(Dadda reduction). A modified Dadda multiplier uses 3:2 compressors to further reduce the speed and improve the efficiency of the design. The multiplier design uses two 8-bit inputs(A and B) to produce a 16-bit output.

Version

3

Category

gpio

Process

sky130A

Shuttle Tags

Open MPW

MPW-3

Tags

multiplier