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ArmleoPC

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ArmleoPC_sky130

ArmleoPC_sky130 is a System-on-Chip integrating ArmleoCPU dual-core RV32IMA CPU capable of booting Linux taped out using Skywater 130nm Technology and open source standard cell library. See: https://github.com/armleo/ArmleoPC_sky130
Currently this repository is empty but in the future will contain Caravel/Caravan based auto-build project using GitHub CI.

Block diagram

ArmleoCPU

ArmleoCPU is RISC-V CPU with Atomics, Multiplier/divider, Cache, MMU, TLB, and will be capable of booting Linux. Two small area cores will be implemented, providing 0.6 IPC @ ~50-75MHz, mainly limited by I/O.

GitHub where everything happens: https://github.com/armleo/ArmleoCPU

SoC

System includes JTAG for debugging, timers, UARTs, SPIs and GPIO alongside a memory controller.

Memory controller implements PSRAM/Flash controller with combined FPGA connection interface.

If enough time is left then IQ Modulator/Demodulator with external PLL will be designed.

Limitations

The main limitation for this project is GPIO speed which is limited to 33MHz and the lack of GPIO pins (only ~38). If possible custom GPIO cells will be implemented with a target VDDIO of 1.8V or 3V3 depending on which we can achieve reasonable speeds.

Author

I am Arman Avetisyan. I study for a Master's degree in IC Design, National Polytech of Armenia, I identify as male and I am 21 years old.

Links

You can see top level repository with all the links and short descriptions here: https://github.com/armleo/ArmleoPC_sky130

If you are collaborating on this project, please click here to access your collaboration files, and click "Accept Share" in the actions column if you haven't done so already.

Owner

Arman Avetisyan

Summary

ArmleoPC is a System-on-Chip integrating ArmleoCPU dual core RV32IMA CPU capable of booting Linux. The SoC includes Flash and PSRAM controllers with custom parallel interface.

Category

processor

Process

sky130A

Shuttle Tags

SSCS-21

Tags

Linux

RISC-V