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UCSC OpenRAM Test Chip

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This project contains a test chip for several OpenRAM memory configurations. The configurations have varying levels of verification. In particular, it has these sizes:

  • sky130_sram_1kbyte_1rw1r_8x1024_8
  • sky130_sram_1kbyte_1rw1r_32x256_8
  • sky130_sram_2kbyte_1rw1r_32x512_8
  • sky130_sram_4kbyte_1rw1r_32x1024_8
  • sky130_sram_8kbyte_1rw1r_32x2048_8
  • sky130_sram_1kbyte_1rw_32x256_8
  • sky130_sram_2kbyte_1rw_32x512_8
  • sky130_sram_4kbyte_1rw_32x1024_8
  • sky130_sram_4kbyte_1rw_64x512_8
  • sky130_sram_8kbyte_1rw_64x1024_8
project layout image
project layout image
Layout Image
Owner

Matthew Guthaus

Organization URL

https://vlsida.soe.ucsc.edu

Summary

Test chip for single and dual port memories created by OpenRAM.

Category

sram

Process

sky130A

Shuttle Tags

Open MPW

MPW-2