im a student who want learn design VHDL
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Manager of Universal Avionics System Corporation(UASC) PLD design group. This group is tasked with designing, implementing and approving, in accordance with RTCA/DO-254 guidance, all ASIC/FPGA used in the Universal Avionics product line.
I am an Analog IC Designer by profession. I have loved and done circuit design from my high school days in India. I love developing new challenging circuits and seeing them work in real applications.
I'm an engineer with experience in analog IC design both in private companies as well as academia. Experienced in design of delay locked loop(DLL), clock recovery, field detectors, voltage limiters, operational amplifiers, current mirrors, bandgap reference and so on.
Design engineer with combined R&D and industrial experience in developing analog/mixed signal ICs for applications including inductive position sensors and imager readouts. Proven abilities with widely used blocks including (but not limited to) filter, amplifier, ADC, DAC, voltage regulators, bandgap reference, ring/LC oscillator, comparator and custom digital logic circuitry. Experience with full tape-out flow including schematic design, analog/mixed-signal simulations, floor planning, layout, system-level verification and chip measurements. Strong familiarity with industry standard tools and instruments used for design, verification and testing such as Cadence, Synopsys, Mentor Graphics, and Keysight. Frontend digital hardware design (ASIC/FPGA) experience using Verilog HDL. Considerable exposure to ASIC backend flow (synthesis and PnR) using Synopsys Design Compiler and Cadence Innovus. Skilled with programming platforms such as MATLAB, C++, C#, Perl, UNIX Shell and VB. Strong education with Ph.D. and MSc. degrees in Electronics Engineering along with several peer-reviewed articles in IEEE journals.
Doctoral student at the Tokyo Institute of Technology.
Driven by my zeal for innovation and technology, I am a passionate VLSI Design Engineer and an open-source enthusiast emphasizing freedom to chip design. Eager to tackle unsolved problems, I strive to make a large imprint on innovation one step at a time.
Provides mixed-signal CMOS training to academia using open-source tools and also solution for the consumer and automotive industry.
Hello, I'm an IC Designer Analog/RF with digital skills. I worked mainly on PLL for mobile tranceivers. I used to work on Cadence Design flow for 20 years.
Ph.D. in electrical engineering, 25 years experience in mixed-signal IC design
Enthusiastic VLSI Design Engineer currently working in Domain Specific Architectures