Tag results for: skills

Experienced Mixed Signal Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Data Conversion, Analog Circuit Design, CMOS and Mixed Signal. Strong engineering professional with a Master's degree focused in Electronics Engineering from Ain Shams University.

SKILLS

Analog Circuit Design | Cadence Virtuoso | Matlab | PCB Design | verilog A |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | Business: Packaging | Business: PCB Manufacture | Circuits: Sensors | System: Packaging | System: PCB | System: Test Equipment |

Juan Pablo Mena

SKILLS

C/C++ | Matlab | Python | Verilog |

AREA OF EXPERTISE

Digital-RTL |

RASHMI

Physical Design Engineer

SKILLS

C/C++ | Calibre | Matlab | Tcl/Tk | VHDL |

AREA OF EXPERTISE

Digital: Placement and Routing | Digital: Synthesis | SoC: Floorplanning |

Luc Wong

I've been worked as an Electrical Engineer for more than 20 years. I'd like to bring Artificial Intelligence to the EE design so that it can be "Self-driving".

SKILLS

C/C++ | Cadence Encounter | Cadence Virtuoso | Eldo | Matlab | Perl | Python | Software Developer | Spectre | SPICE Opus | System Verilog | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | Business: Design Services | Circuits: Communication | Circuits: Filters | Circuits: Memory | Circuits: Microcontrollers | Circuits: Power Management | Circuits: Sensors | Circuits: Signal Processing | Digital: DFT | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis | Digital: Verification | Miscellaneous: Neural Networks | SoC: ESD | SoC: Floorplanning | SoC: Verification | System: Chip Editing | System: FPGA Programming | System: PCB | System: Power Integrity | System: Signal Integrity | System: Test Equipment | System: Test Programming |

Denise Cocco

President and CEO

SKILLS

C/C++ | Cadence Encounter | Cadence Virtuoso | Calibre | Eldo | Matlab | Perl | Python | SKILL | Spectre | SPICE Opus | System Verilog | Tanner L-Edit | Verilog |

AREA OF EXPERTISE

Analog: Modeling | Analog: Simulation | Analog: Verification | Business: Design Services | Business: Foundry Services | Business: Packaging | Circuits: Communication | Circuits: Filters | Circuits: Memory | Circuits: Power Management | Circuits: Sensors | Circuits: Signal Processing | Digital: Placement and Routing | Digital: RTL | SoC: ESD | SoC: Floorplanning | SoC: Verification | System: Chip Editing | System: Fabrication Process | System: Packaging | System: Quality Assurance |

Milind Gupta

I am an Analog IC Designer by profession. I have loved and done circuit design from my high school days in India. I love developing new challenging circuits and seeing them work in real applications.

SKILLS

C/C++ | Cadence Virtuoso | Eagle CAD | Matlab | ngspice | Octave | Scilab | SKILL | Spectre | C | Lua |

AREA OF EXPERTISE

Analog: Design |

Alfonso Chacon-Rodriguez

Professor in Electronics Engineering with a PhD. in VLSI (Universidad Nacional de Mar del Plata). Expertise in digital RTL and physical design. Experience in FPGA RTL and HLS design for heterogeneous computing. Knowledge in sub-threshold analog design. Fiction writer (National Literature Award for Novel, 2011, Costa Rica)

SKILLS

Calibre | Eldo | Electric CAD | Matlab | Python | System Verilog | Tcl/Tk | Verilog |

AREA OF EXPERTISE

Analog: Design | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis |

Mauris DeSilva

SKILLS

Leadership | Matlab |

AREA OF EXPERTISE

Business: Design Services | Business: Patents |

Jorge Marin

SKILLS

Cadence Virtuoso | Matlab |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Modeling | Analog: Simulation | Circuits: Sensors |

KADAR A A

I am researcher with goals of developing high end technologies for the future.

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Eldo | Leadership | Matlab | ngspice | Tanner L-Edit | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Digital: RTL | System: FPGA Programming |

Emre Goncu

SKILLS

Cadence Encounter | Cadence Virtuoso | Matlab | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Student | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis |

nik2402

I am an electronic hobbyist who enjoys building different electronic circuits and systems.

SKILLS

Cadence Virtuoso | Eagle CAD | Electric CAD | Matlab | Spectre | VHDL |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Simulation | Analog: Verification | Circuits: Power Management | Circuits: Signal Processing | System: PCB | System: Test Equipment | System: Test Programming |

Tim Edwards

Developer of open source EDA tools on Open Circuit Design

SKILLS

Analog CMOS Circuit | Analog IC Design | Analog/Digital Circuit Design | C/C++ | Circuit Design | Matlab | Python | Software Developer | Verilog | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

Analog | Analog IC | Analog IC Design | Analog-Layout | Analog-Mixed Signal-DV | Analog-Simulation | Analog-Verification | ASIC Design/Verification | Automatic Circuit Design | CAD-Dev | CAD-Scripts | Communication and Signal Processing | Cryptography | Design Automation | Digital-DFT | Evolutionary algorithm | signal processing | SOC-DV | SOC-ESD | SOC-Packaging | System-PCB | System-Signal-Integrity | Analog-ADC | Analog-LDO | Digital-BE | Digital-DV | Digital-RTL | System-DSP | System-Filters |

Mostafa Elbediwy

Teaching assistant for ASIC/FPGA and digital ICs courses.

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Matlab | System Verilog | Verilog |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Digital: DFT | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis | Digital: Verification |

Rishi B. Raghav

I am an Analog Designer passionate about building and exploring new and novel integrated circuits to create a better world.

SKILLS

Analog IC Design | Matlab |

AREA OF EXPERTISE

Analog IC Design | Analog-ADC | Analog-Amplifiers | Analog-Modeling | Analog-Simulation | Analog-Verification | ASIC Design/Verification |

Pascal Buchschacher

designing mixed-mode ASICs since 1986 :-)

SKILLS

Cadence Virtuoso | Leadership | Matlab | Spectre | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | SoC: Verification |

Kevin Chou

SKILLS

C/C++ | Eldo | Matlab | ngspice | Octave | Python | Software Developer | Spectre | Tcl/Tk |

AREA OF EXPERTISE

CAD: Tool Development |

Hervé Pierre

Research engineer and teaching assistant in microelectronic, microsystems and bioelectronic at the university of Liège, Belgium

SKILLS

C/C++ | Electric CAD | Matlab | Python | Software Developer | SPICE Opus | VHDL |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Circuits: Microcontrollers | Circuits: Sensors | Miscellaneous: Cryptography | System: FPGA Programming | System: PCB |

Stephen Wu

SKILLS

Cadence Virtuoso | Calibre | Diva | Eldo | Electric CAD | Magic CAD | Matlab | Netgen | ngspice | Octave | Spectre | Verilog |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | Circuits: Sensors | Circuits: Signal Processing |

Florian Ballenegger

Analog and mixed-signal IC designer.

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Matlab | ngspice | Python | Spectre |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Simulation | CAD: Scripting | Circuits: Power Management | SoC: ESD |

Aishwarya Lakshminarayanan

Analog IC design enthusiast, based in Frankfurt, Germany.

SKILLS

Analog CMOS Circuit | Analog | Analog IC Design | Analog/Digital Circuit Design | Matlab |

AREA OF EXPERTISE

Analog IC Design | Analog-Amplifiers |

Akhil

SKILLS

C/C++ | Matlab | VHDL |

AREA OF EXPERTISE

Academic: Student |

Laurent Lamesch

HW development engineer

SKILLS

C/C++ | Eagle CAD | Matlab | Octave | VHDL |

AREA OF EXPERTISE

Analog: Design | Analog: Simulation | Analog: Verification | Circuits: Communication | Circuits: Filters | Circuits: Microcontrollers | Circuits: Power Management | Circuits: Sensors | Circuits: Signal Processing | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis | Digital: Verification | System: FPGA Programming | System: PCB | System: Power Integrity | System: Test Equipment |

Akhil Varghese Mathew

SKILLS

Cadence Virtuoso | Calibre | Matlab | Python | Spectre |

AREA OF EXPERTISE

Academic: Student | Analog: Design | Analog: Layout | Analog: Simulation | Analog: Verification |

Kenji Aono

SKILLS

C/C++ | Cadence Virtuoso | Eagle CAD | Matlab | Python | Spectre |

AREA OF EXPERTISE

Academic: Research |

Stepan Sutula

I received the B.S. degree in Industrial Electronics Engineering from the Universitat Politècnica de Catalunya, Spain, in 2007, and the M.S. degree in Micro- and Nanoelectronics Engineering in 2009 and the Ph.D. degree in Microelectronics and Electronic Systems in 2015 both from the Universitat Autònoma de Barcelona, Spain. From 2006 to 2008, I was with Investigation Total Ware, S.A., Spain, where I was engaged in analog and mixed-signal circuit design for highly reliable wireless telecommunication systems. From 2008 to 2015, I was with the Integrated Circuits and Systems design group at the Institut de Microelectrònica de Barcelona, CNM, CSIC, Spain, designing low-power high-precision mixed-signal ASICs for integrated smart sensors and IP blocks. From 2015 to 2016, I was with Broadcom Ltd., Barcelona, Spain, developing low-power CMOS IPs like low-temperature-drift oscillators, varible-temperature-coefficient current/voltage generators, temperature sensors, cross-domain level shifting and biasing circuits, touch-sensor transmitter drivers. I am co-author of 12 publications and participant in several research and industrial projects using a wide range of CMOS technology nodes. I am recipient of the 2007 Highest Grade Point Average in the Graduating Class Award, the 2014 Best Paper Award and the 2015 Student Best Paper Award Honorable Mention. My skills include: high-performance continuous-time/switched-capacitor circuits such as low-power high-resolution ADCs/DACs using Class-AB OpAmps; system high-level modeling (SciPy/Sage, Matlab); system electrical-level modeling (Verilog/-A/-AMS); EKV circuit-level modeling; full-custom IC design cycle (gEDA Tools/Cadence Virtuoso: from schematics to layout and verification); development of low-noise and low-distortion test equipment (including microcontrollers and FPGAs) and software (using C++, Tcl, VB, Python); and, experimental IC measures and parameter extraction.

SKILLS

Analog CMOS Circuit | Analog | Analog IC Design | Analog/Digital Circuit Design | C/C++ | Circuit Design | Matlab | Python | Software Developer | Verilog | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

Analog | Analog IC | Analog IC Design | Analog-Amplifiers | Analog-Layout | Analog-Mixed Signal-DV | Analog-Modeling | Analog-Simulation | Analog-Verification | ASIC Design/Verification | Automatic Circuit Design | CAD-Dev | CAD-Scripts | Communication and Signal Processing | Design Automation | Industrial Engineering | signal processing | SOC-DV | SOC-Packaging | System-PCB | System-Power-Integrity | System-Signal-Integrity | Analog-ADC | Analog-LDO | Digital-DV | System-Filters |

MADAN S

Analog circuit designer with passion in taking challenges .Interest in ADC,DAC,PLL,SDADC,LDO.Done layout of all these blocks.

SKILLS

Cadence Virtuoso | Calibre | Matlab | Spectre | Verilog | VHDL |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Simulation |

HARSHITHA BASAVARAJU

SKILLS

Analog CMOS Circuit | Analog/Digital Circuit Design | C/C++ | Matlab |

AREA OF EXPERTISE

Analog IC Design |

Sultan Bepari

Hello I'm sultan, and I'm from KLE technological University hubli and I'm very exited to do this course on picorisc.

SKILLS

C/C++ | Cadence Encounter | Cadence Virtuoso | Matlab | Python | System Verilog | System-C | Verilog |

AREA OF EXPERTISE

Academic: Research | Academic: Student |

Vadim Platonov

Analog/Mixed-Signal IC Design Engineer

SKILLS

Analog CMOS Circuit | Analog | Analog IC Design | Analog/Digital Circuit Design | Circuit Design | Matlab | Verilog |

AREA OF EXPERTISE

Analog IC Design | Analog-Layout | Analog-ADC |

Gregory Davill

Full time: Electronics Engineer with an interest in embedded systems solutions. I can take a project goal and design, develop, prototype, program, validate an embedded system reaching that goal. Part-time: Maker, interested in rapid prototyping, my lab has basic machines: CO2 Laser cutter, 3d printers, small milling machine. I've built 3 of my own 3d printers.

SKILLS

Analog/Digital Circuit Design | C/C++ | Circuit Design | Matlab | Python | Software Developer |

AREA OF EXPERTISE

CAD-Dev | CAD-Scripts | Industrial Engineering | signal processing | System-PCB |

Andrea Koo

Engineer at NASA

SKILLS

Matlab |

AREA OF EXPERTISE

Analog |

Johanny Saenz

Electrical Engineer M.Sc. Microelectronics

SKILLS

Analog CMOS Circuit | Analog/Digital Circuit Design | Cadence Virtuoso | Matlab | Octave | Spectre | Verilog |

AREA OF EXPERTISE

Analog IC Design | Analog-ADC | Analog-Amplifiers | Analog-Mixed Signal-DV | Analog-Simulation | Analog: Design | Analog: Modeling | Analog: Simulation | CAD-Scripts | Cryptography |

Eamonn Lieske

SKILLS

C/C++ | Cadence Virtuoso | Eagle CAD | Matlab | ngspice | Octave | Python |

AREA OF EXPERTISE

Academic: Research | Analog: Design | CAD: Tool Development | Circuits: Communication | Circuits: Filters | Circuits: Microcontrollers | Circuits: Signal Processing |

Christian Escobar

SKILLS

Analog | Matlab | SPICEOption 13 |

AREA OF EXPERTISE

Analog | Analog-Amplifiers | Analog-Modeling | Industrial Engineering |

Juanjo Garrido Serrato

SKILLS

VHDL | C | C++ | matlab |

AREA OF EXPERTISE

Academic: Research | Academic: Student |

Ibrahim Muhammed El-Saeed Ibrahim

I'm an AMS Design engineer. I like the IC design world and my recent goal is to be a scientist :)

SKILLS

Analog | Analog CMOS Circuit | Analog IC Design | Analog/Digital Circuit Design | Circuit Design | Matlab | Perl | SoC Development | VLSI/ASIC |

AREA OF EXPERTISE

Analog IC | Analog IC Design | Analog-Amplifiers | Analog-Layout | Analog-Modeling | Analog-Simulation | Analog-Verification | ASIC Design/Verification | Automatic Circuit Design | CAD-Scripts | Design Automation |

Walaa Ashraf Ayoub

Electronic Engineer, CAD Engineer & Software QA Engineer

SKILLS

Analog IC Design | Matlab |

AREA OF EXPERTISE

Analog IC Design | Analog-Simulation | CAD-Scripts |

Eduardo Augusto da Costa

Eduardo is an Electrical Engineer engaged in hardware development with a true passion for developing and enhancing applications. While at university, he worked in a variety of projects, from VHDL in a SOC project, to a PCB for a power circuit, and even web interfaces for electronic devices network connected. He allies his technical background with great communication skills. He is used to and is passionate about working in diverse cultural environment as was his period as an international student in Japan. He also got a certification in in Digital Integrated Circuit Design and Project Flow with Cadence tools (IC Brazil Program). Currently he works at HT Micron, and is interested in positions related to chip design, hardware design, embedded software development and similar areas.

SKILLS

C/C++ | Cadence Encounter | Eagle CAD | Matlab | Octave | Software Developer | System Verilog | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Digital: RTL |

Arun kothinti

SKILLS

C/C++ | Matlab | IOT | embedded systems |

AREA OF EXPERTISE

Academic: Research | Academic: Student | Business: Marketing |

dongxu yong

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Matlab | Verilog |

AREA OF EXPERTISE

Analog: Design | Digital: RTL |

Alberto Gomez

Passionate about Open Source RF Design!

SKILLS

Analog IC Design | C/C++ | Matlab | Python | Scilab |

AREA OF EXPERTISE

Analog-ADC | CAD-Scripts | SOC-ESD |

Mahesh Bhat K

Still a Bachelor student..Trying to get know more always!!

SKILLS

C/C++ | Cadence Virtuoso | Matlab | Python | Verilog |

AREA OF EXPERTISE

Academic: Student |

Taher Kourany

Taher Kourany joined Scenario Design Services, Cairo, Egypt as a Senior IC Design Consultant in 2016. He received B.Sc Degree in electronics and communications engineering from Ain-Shams University, Cairo, Egypt, in 2012. He received M.S. degree in electronics from the American University, Cairo, Egypt, in 2015. Until October 2015 he was a Research Assistant with the Center of Nanoelectonics and Devices Research Labs at Zewail City for Science and Technology. Mr. Kourany has published papers in the field of time complexity reduction algorithms of floorplan representations, area and wirelength minimization, Pareto-front multi-objective optimization algorithms of highly chaotic systems. His current research interests include high linearity Power Amplifiers, time complexity reduction algorithms, data structures, parameters estimation of highly chaotic systems, and the synthesis of analog IC design and layout.

SKILLS

Analog CMOS Circuit | Analog IC Design | Analog/Digital Circuit Design | Circuit Design | Matlab |

AREA OF EXPERTISE

Analog IC Design | Analog-Amplifiers | Analog-Layout | Analog-LDO | Analog-Simulation | Automatic Circuit Design | CAD-Dev | CAD-Scripts | Design Automation |

Hyunjin Noh

SKILLS

C/C++ | Matlab | Python | Verilog | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

ASIC Design/Verification | Design Automation | Digital-RTL |

Alberto Gancedo

SKILLS

Cadence Virtuoso | Calibre | Matlab | Python | Verilog |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Simulation | Circuits: Communication | Circuits: Sensors |

Mustafa Sami

SKILLS

Cadence Virtuoso | Calibre | Matlab | Python | Spectre | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Student | Analog: Design | Analog: Layout | Analog: Simulation | Circuits: Communication | Circuits: Filters | Circuits: Power Management |

Muhammad Awais Bin Altaf

SKILLS

Cadence Virtuoso | Calibre | Matlab | Spectre | Verilog |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Analog: Design | Analog: Layout | Analog: Simulation | Circuits: Sensors | Circuits: Signal Processing | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis | Digital: Verification |

Kanan Saurabh

SKILLS

Cadence Virtuoso | Calibre | Leadership | Matlab | Spectre |

AREA OF EXPERTISE

Analog: Design |

Sreenivasan Jouly

SKILLS

C/C++ | Matlab | Python | System Verilog | Verilog |

AREA OF EXPERTISE

Digital: RTL |

eldho george

SKILLS

Cadence Virtuoso | Matlab | Perl | System Verilog | Verilog |

AREA OF EXPERTISE

Digital: RTL | Digital: Verification | SoC: Verification |

Vasilis Goulemes

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Matlab | Python |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Simulation | Analog: Verification | Circuits: Communication | Circuits: Filters | Circuits: Power Management | Circuits: Sensors | Circuits: Signal Processing |

ِAhmed

SKILLS

C/C++ | Cadence Encounter | Cadence Virtuoso | Calibre | Eldo | Matlab | Spectre | System Verilog | Tcl/Tk | Verilog | VHDL | vb |

AREA OF EXPERTISE

Academic: Research | CAD: Tool Development |

Youssef Ahmed Mohammed

senior student-ECE departmant-faculty of engineering-ASU.

SKILLS

C/C++ | Cadence Virtuoso | Matlab | Verilog |

AREA OF EXPERTISE

Analog: Design |

Sahand Noorizadeh

SKILLS

Matlab | Python | RF | Analog |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | Circuits: Filters | System: Packaging | System: PCB | System: Signal Integrity | System: Test Equipment |

Akshay Godse

SKILLS

Cadence Virtuoso | Matlab | System Verilog | Verilog |

AREA OF EXPERTISE

Academic: Student |

Viraj Bharadwaj Korede

SKILLS

C/C++ | Cadence Virtuoso | Matlab | Octave | Python | Verilog |

AREA OF EXPERTISE

Academic: Student |

SAKTHIVEL SM

VLSI PROFESSIONAL

SKILLS

C/C++ | Circuit Design | Matlab | Verilog | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

Cryptography | Digital-DFT | SOC-DV |

Theodor Fernau

SKILLS

C/C++ | Matlab |

AREA OF EXPERTISE

System: PCB |

Colin Hart

SKILLS

C/C++ | Cadence Virtuoso | Matlab | Python |

AREA OF EXPERTISE

Analog: Design | Analog: Simulation | CAD: Tool Development | Circuits: Communication | System: PCB | System: Test Equipment |

Christian Lee Prather

Computer Science and Mechanical Engineering student

SKILLS

C/C++ | Eagle CAD | Matlab | Python |

AREA OF EXPERTISE

Academic: Student |

Vivek Parmar

SKILLS

C/C++ | Cadence Encounter | Cadence Virtuoso | Calibre | Eagle CAD | Matlab | ngspice | Octave | Python | Software Developer | Spectre | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Student | Analog: Modeling | Analog: Simulation | Circuits: Memory | Digital: RTL | Digital: Synthesis | Digital: Verification | Miscellaneous: Cryptography | Miscellaneous: Neural Networks | System: FPGA Programming | System: PCB | System: Test Equipment |

Nathan Tang

Student at Poolesville High School interested in computer science and engineering

SKILLS

C/C++ | Matlab | Python |

AREA OF EXPERTISE

Academic: Student |

Valérian Lalucaa

SKILLS

Cadence Virtuoso | Matlab | Python |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Analog: Design | Analog: Layout | Analog: Simulation | Analog: Verification | Circuits: Sensors |

Charu

SKILLS

C/C++ | Eagle CAD | Matlab |

AREA OF EXPERTISE

Circuits: Microcontrollers | System: PCB |

Sajal Goyal

SKILLS

C/C++ | Cadence Virtuoso | Matlab | System Verilog | Tcl/Tk | Verilog |

AREA OF EXPERTISE

Academic: Student | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis | SoC: Floorplanning | SoC: Verification |

Prem Kumar A

A Mixed signal designer aspirant

SKILLS

Cadence Virtuoso | Matlab | VHDL |

AREA OF EXPERTISE

Academic: Student |

Jean Carlos Schenuemann

SKILLS

C/C++ | Circuit Design | Matlab | Python | Software Developer | Verilog |

AREA OF EXPERTISE

signal processing | System-DSP | System-Filters |

Swapnil ..

Chief Engineer Embedded Systems, VLSI startup

SKILLS

C/C++ | Matlab | System Verilog |

AREA OF EXPERTISE

Business: Design Services | Digital: Verification |

Christoph Henkel

SKILLS

C/C++ | Eagle CAD | Matlab | Tanner L-Edit |

AREA OF EXPERTISE

Circuits: Microcontrollers | System: Test Programming |

Stephan Ahles

SKILLS

C/C++ | Cadence Virtuoso | Eldo | Electric CAD | Leadership | Matlab | ngspice | Octave | Python | SKILL | Spectre | Verilog | VHDL |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Simulation | Analog: Verification | Business: Design Services | Business: Marketing | Business: Sales | CAD: Scripting | Circuits: Communication | Circuits: Signal Processing | Digital: RTL | Digital: Synthesis |

Jacob Rast

SKILLS

Analog/Digital Circuit Design | C/C++ | Matlab | Python | Verilog |

AREA OF EXPERTISE

Analog |

Luis Eduardo Rueda Guerrero

SKILLS

Cadence Virtuoso | Calibre | Matlab | ngspice | Octave | Scilab | System Verilog | Verilog |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | Circuits: Microcontrollers | Circuits: Power Management | Circuits: Sensors | Circuits: Signal Processing | Miscellaneous: Neural Networks |

Camillo

Experienced Analog Design Engineer with strong background in HV CMOS ASICs.

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Matlab | Octave | Perl | Python | SKILL | Spectre |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | Circuits: Power Management | SoC: ESD | SoC: Floorplanning | System: PCB |

Wilian D. Padilha

SKILLS

C/C++ | Cadence Virtuoso | Matlab | Software Developer | VHDL |

AREA OF EXPERTISE

Academic: Research | Academic: Student | Analog: Design | Analog: Layout | Circuits: Communication | Circuits: Power Management |

Salvatore M. Cherchi

SKILLS

C/C++ | Eagle CAD | Electric CAD | Matlab | ngspice | Python | System Verilog |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Modeling | Business: Design Services | Circuits: Communication | Circuits: Memory | Circuits: Signal Processing | Miscellaneous: Cryptography | SoC: ESD | SoC: Floorplanning | System: Fabrication Process | System: Power Integrity | System: Signal Integrity |

Ari Paasio

SKILLS

Cadence Virtuoso | Calibre | Eldo | Leadership | Matlab | Octave | Spectre |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Analog: Design | Analog: Layout | Analog: Simulation | Analog: Verification | Circuits: Filters | Circuits: Memory | Circuits: Microcontrollers | Circuits: Sensors | Circuits: Signal Processing | Miscellaneous: Neural Networks |

Alfonso Breglia

SKILLS

Analog IC Design | Analog/Digital Circuit Design | C/C++ | Circuit Design | Matlab | Python | Software Developer |

AREA OF EXPERTISE

Analog | Analog-Amplifiers | Analog-Modeling | Analog-Simulation | Digital-DFT | Evolutionary algorithm | Industrial Engineering |

Augustine Kuo

Vice President of Engineering - Seamless Microsystems. We design high performance AFEs using proprietary and patented technology that encodes the signal in the time-domain instead of voltage or current. This enables us to design low-power ADCs and amplifiers in scaled CMOS. Contact us if you'd like to hear more and engage our services.

SKILLS

Cadence Virtuoso | Calibre | Diva | Matlab | Perl | SKILL | Spectre | System Verilog | Verilog |

AREA OF EXPERTISE

Analog: Design |

José Edil G. de Medeiros

SKILLS

C/C++ | Cadence Virtuoso | Matlab | ngspice | Octave | Spectre | System-C |

AREA OF EXPERTISE

Analog: Design | Analog: Simulation |

Kenneth Jose Rojas Rodriguez

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Matlab | Python | VHDL |

AREA OF EXPERTISE

Academic: Student | Analog: Design | Analog: Layout | Circuits: Communication | System: PCB |

Maria Anne San Andres

SKILLS

Matlab |

AREA OF EXPERTISE

Academic: Student |

Rifat Demircioglu

Managing Partner

SKILLS

C/C++ | Leadership | Matlab | Perl | System Verilog | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Business: Design Services | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis | System: FPGA Programming |

Mathieu Coustans

SKILLS

Cadence Encounter | Cadence Virtuoso | Eldo | Matlab | Spectre | System Verilog | VHDL |

AREA OF EXPERTISE

Academic: Research | Analog: Design |

Adithya (AJ) Naresh

SKILLS

C/C++ | Eagle CAD | Matlab | Python | Scilab | Verilog |

AREA OF EXPERTISE

System: Test Programming |

Yaswanth Kumar Cherivirala

SKILLS

C/C++ | Cadence Encounter | Cadence Virtuoso | Calibre | Matlab | Python | Spectre | Tcl/Tk | Verilog |

AREA OF EXPERTISE

Academic: Research | Academic: Student | Analog: Design | Analog: Modeling | Circuits: Power Management |

Mostafa El Naggar

SKILLS

C/C++ | Cadence Virtuoso | Matlab | Verilog |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Analog: Design | Digital: RTL | Digital: Synthesis |

Michael OBrien

SKILLS

C/C++ | Matlab | Python |

AREA OF EXPERTISE

System: Test Programming |

Armagan ERGUN

SKILLS

Cadence Encounter | Cadence Virtuoso | Eagle CAD | Matlab | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Student |

P Santosh Kumar Patra

I am a final year Masters student of NIT Rourkela, I am interested in SoC designing using RISCV ISA

SKILLS

C/C++ | Matlab | Python | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Student |

William Prodanov

SKILLS

Cadence Virtuoso | Calibre | Eldo | Matlab | Octave | Spectre |

AREA OF EXPERTISE

Analog: Design | Analog: Simulation | Analog: Verification | CAD: Scripting | Circuits: Signal Processing |

Vernon Greer

Analog IC Design Engineer with considerable expertise in mid- to high-frequency transistor-level design in the semiconductor industry, including clock synthesis, radio frequency circuitry (RF), and memory circuitry design. Experience also includes testing at board- and wafer-level, test automation, and simulation scripting.

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Eldo | Matlab | Perl | Python | SKILL | Spectre | Tcl/Tk | Verilog |

AREA OF EXPERTISE

Analog: Design | Analog: Simulation | Analog: Verification | CAD: Scripting | Circuits: Communication | Circuits: Memory |

Sreekar

SKILLS

Matlab | System Verilog | Verilog |

AREA OF EXPERTISE

Academic: Student |

Pengyu Wei

SKILLS

Cadence Virtuoso | Matlab | Octave |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Modeling | SoC: ESD | System: PCB | System: Test Equipment |

Saroj Rout

Provides mixed-signal CMOS training to academia using open-source tools and also solution for the consumer and automotive industry.

SKILLS

Calibre | Eagle CAD | Magic CAD | Matlab | ngspice | Octave | Perl | Python | Scilab | SKILL | Spectre | System Verilog | Tanner L-Edit | Verilog |

AREA OF EXPERTISE

Academic: Teaching | Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | Business: Design Services | CAD: Scripting | Circuits: Filters | Circuits: Power Management | Circuits: Sensors | Circuits: Signal Processing | Digital: RTL | SoC: ESD | System: PCB | System: Signal Integrity | System: Test Equipment | System: Test Programming |

Jose Maria Hinojo

SKILLS

Allegro | Altium | C/C++ | Cadence Assura | Cadence Encounter | Cadence Virtuoso | Calibre | Matlab | Perl | Tcl/Tk | VHDL |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis | Digital: Verification | System: Chip Editing |

Marco Adel

SKILLS

Cadence Virtuoso | Calibre | Leadership | Matlab | Verilog | VHDL |

AREA OF EXPERTISE

Analog: Design | Analog: Layout |

Michael Vacek

SKILLS

C/C++ | Circuit Design | Matlab | Python | Software Developer | Verilog | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

Communication and Signal Processing | signal processing | System-PCB | Digital-RTL | System-DSP |

Kevin Huynh

SKILLS

C/C++ | Cadence Virtuoso | Matlab | Perl | Python | Scilab | Spectre | Tcl/Tk | Verilog |

AREA OF EXPERTISE

Analog: Design | Analog: Simulation | Circuits: Communication | Circuits: Filters |

Martin Baudino

I am an Electronics Engineer with experience in IT Management, Firmware Development and Education. I spend my spare time looking for interesting projects and reading about technology trends.

SKILLS

C/C++ | Leadership | Matlab | Python | Software Developer | VHDL |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Business: Management | Circuits: Microcontrollers | System: Test Equipment |

James Tandon

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Eagle CAD | Eldo | Leadership | Magic CAD | Matlab | Octave | Perl | Python | Scilab | Software Developer | System Verilog | Verilog |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Analog: Design | Analog: Layout | Analog: Simulation | Business: Design Services | CAD: Tool Development | Circuits: Microcontrollers | Digital: RTL | Digital: Synthesis | SoC: Floorplanning | System: Chip Editing | System: FPGA Programming | System: PCB |

Marius Voicu

I am an EMC Specialist working at Renault and currently looking to fill my free time with interesting projects (Hardware, EMC, Design, Simulation)

SKILLS

Analog | Analog IC Design | Analog/Digital Circuit Design | Circuit Design | Matlab | SPICEOption 13 | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

Analog-Layout | Analog-Modeling | Analog-Simulation | Communication and Signal Processing | System-PCB | System-Power-Integrity | System-Signal-Integrity | System-Filters |

Nithin Angadi

SKILLS

C/C++ | Cadence Virtuoso | Matlab | Python | System Verilog | Verilog |

AREA OF EXPERTISE

Academic: Student |

Hasith Ishara

Graduated 4 tears back in engineering specialized in electronics and telecommuniation engineering with a first class. Now I am working at a startup as the team lead of the embedded design team. I am also a postgraduate student in Msc in wireless communication engineering course. Creon Solutions is my freelancer name. I do image processing, PCB and circuit designs ...etc in Freelancer.com

SKILLS

C/C++ | Matlab | Python | Software Developer |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Simulation | System: PCB | System: Power Integrity | System: Signal Integrity |

Federico Paredes

Digital designer experienced in high-speed ASICs for optical/copper transceivers, including DSPs, error correction and SoC support.

SKILLS

C/C++ | Cadence Encounter | Matlab | Octave | Python | System Verilog | System-C | Verilog |

AREA OF EXPERTISE

CAD: Scripting | Circuits: Communication | Circuits: Signal Processing | Digital: RTL | Digital: Synthesis | Digital: Verification |

Chinmay Sharma

VLSI Enthusiast

SKILLS

Cadence Virtuoso | Magic CAD | Matlab |

AREA OF EXPERTISE

Digital: Placement and Routing |

Azhar Din

Passionate about engineering and electronics. Love teaching and mentoring. Highly experience in analogue and RF electronics and enjoy managing projects.

SKILLS

Cadence Virtuoso | Calibre | Diva | Leadership | Matlab | Perl | Spectre |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | Business: Design Services | Business: Management | CAD: Scripting | Circuits: Communication | Circuits: Filters | Circuits: Power Management | Circuits: Sensors | SoC: ESD | SoC: Floorplanning | SoC: Verification | System: Fabrication Process | System: PCB | System: Test Equipment |

Amruthraj Koparde

SKILLS

C/C++ | Matlab | Python | Verilog |

AREA OF EXPERTISE

Academic: Student |

Jose T. de Sousa

José T. de Sousa holds a PhD degree from Imperial College London (1998) and has been a university lecturer and researcher at Lisbon University (1999-present). He holds 4 international patents, is co-author of one book, and was General Chair of the Field Programmable Logic and Applications Conference in 2013. Dr. de Sousa has published more than 70 technical papers in international journals and conferences. He was co-founder and CEO of Coreworks, a semiconductor intellectual property company, which he ran from 2001 to 2013. His specialties are digital circuit design, hardware/software architecture, technical team management and semiconductor IP marketing and sales.

SKILLS

C/C++ | Cadence Encounter | Leadership | Matlab | Octave | Python | Software Developer | System Verilog | System-C | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Business: Design Services | Business: Management | Business: Marketing | Business: Packaging | Business: Patents | Business: Public Relations | Business: Sales | CAD: Scripting |

Mahmoud Abdelgawad

SKILLS

C/C++ | Cadence Encounter | Cadence Virtuoso | Calibre | Matlab | Python | System Verilog | Tcl/Tk | Verilog |

AREA OF EXPERTISE

Academic: Research | Digital: DFT | Digital: RTL | Digital: Synthesis | Digital: Verification |

Syed Asad Alam

Post-doctoral research fellow in the discipline of Software and Systems, School of Computer Science and Statistics, Trinity College Dublin, with a keen interest in learning new things, specially related to computer science and engineering. Around 4 years experience of teaching and research and more than 10 years of experience in architecture design, optimization, analysis, implementation and verification of digital and digital signal processing systems on FPGAs and ASICs. Diversifying research career by working on quantization of deep convolution neural networks. Author of three peer reviewed journal publications and five international conference publications.

SKILLS

C/C++ | Matlab | Python | System Verilog | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Circuits: Filters | Circuits: Microcontrollers | Circuits: Signal Processing | Digital: RTL | System: FPGA Programming |

Omar Abu El-ela

Electronics and Communication student

SKILLS

C/C++ | Eagle CAD | Matlab | Spectre | Verilog |

AREA OF EXPERTISE

Academic: Student | Analog: Design |

Jens Pejtersen

SKILLS

Cadence Virtuoso | Calibre | Matlab | Python | SKILL |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification |

Dejan Mirkovic

Electronics Engineer and Researcher with a demonstrated history of working in the higher education industry. Skilled in CAD/EDA tools for ASIC, PCB and FPGA design, scripting and programming. Education professional with a PhD in Electrical Engineering and Computer Science from University of Nis, Faculty of Electronic Engineering Nis, Serbia.

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Eldo | Matlab | Octave | Python | SKILL | Spectre | System-C | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | CAD: Scripting | Circuits: Filters | Circuits: Signal Processing | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis | System: FPGA Programming | System: PCB |

Sandipan Sinha

SKILLS

C/C++ | Cadence Virtuoso | Matlab | Verilog |

AREA OF EXPERTISE

Academic: Student | Analog: Design | Digital: Placement and Routing | Digital: Synthesis | SoC: Floorplanning | System: Signal Integrity |

AGhani

Associate Professor (Electrical and Electronic Engineering) Implantable chip design Low power sensors

SKILLS

Cadence Encounter | Cadence Virtuoso | Leadership | Matlab | SPICE Opus | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Layout | Analog: Simulation | Circuits: Sensors | Digital: Placement and Routing | Digital: RTL | System: Chip Editing | System: FPGA Programming |

Constantin Runge

SKILLS

C/C++ | Cadence Virtuoso | Matlab | ngspice | Python | Software Developer | Spectre | Julia |

AREA OF EXPERTISE

Academic: Student | Analog: Design | Analog: Simulation | Circuits: Filters | Circuits: Signal Processing | Digital: DFT | Miscellaneous: Neural Networks |

Ganesh Prasad B K

I am an electronics engineer currently working as an intern in STMicroelectronics.

SKILLS

Cadence Virtuoso | Calibre | Eldo | Matlab | Python | Spectre | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Student | Analog: Simulation |

ernesto

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Matlab | Python | Spectre |

AREA OF EXPERTISE

Analog: Design | Circuits: Communication | Circuits: Signal Processing |

Max Fil

SKILLS

C/C++ | Matlab | Verilog | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

ASIC Design/Verification | Communication and Signal Processing | Digital-RTL | System-DSP |

ThiagoLima

SKILLS

C/C++ | Matlab |

AREA OF EXPERTISE

Academic: Student |

Ross Miller

SKILLS

Matlab |

AREA OF EXPERTISE

Academic: Research |

JULIO CESAR SALDANA PUMARICA

SKILLS

Cadence Virtuoso | Calibre | Matlab | Octave | SKILL | Spectre | Tanner L-Edit |

AREA OF EXPERTISE

Analog: Design |

Abdelkrim Bessaad

I am an Analog/mixed signal IC designer. I worked with different technologies like ams035, xh035 and st 130nm.

SKILLS

Analog CMOS Circuit | Analog | Analog IC Design | Analog/Digital Circuit Design | Circuit Design | Matlab | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

Analog IC Design | Analog-Amplifiers | Analog-Layout | Analog-Simulation | Digital-RTL |

Pablo Cayuela

SKILLS

C/C++ | Electric CAD | Matlab | Octave | Scilab | Tanner L-Edit | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Analog: Design | Digital: RTL | System: FPGA Programming |

Nahush

SKILLS

C/C++ | Cadence Virtuoso | Matlab | Tcl/Tk | Verilog |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Layout |

Hamdi Esen

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Matlab | Octave | Spectre |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Simulation |

Mohammed Essam Abd El Samee Soliman

I works as junior physical design engineer and I have passion in VLSI field specially in digital IC design. I have experience in writing RTL, test benches and in PnR flow.

SKILLS

Leadership | Matlab | Perl | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Digital: Placement and Routing | Digital: RTL | Digital: Synthesis |

Shabab Alam

SKILLS

Cadence Virtuoso | Magic CAD | Matlab | Netgen | Python |

AREA OF EXPERTISE

Academic: Research | Academic: Student | Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Circuits: Memory | Digital: DFT |

Ashutosh Jain

SKILLS

Analog/Digital Circuit Design | Matlab | Python | Verilog |

AREA OF EXPERTISE

ASIC Design/Verification | Digital-RTL |

Mohamed Khairy Bahry

I have more than five years’ experience in electronics integrated circuits industry. I have been involved in more than six silicon runs which were all successful and meeting expectations.

SKILLS

Analog | Analog CMOS Circuit | Analog IC Design | Analog/Digital Circuit Design | Circuit Design | Matlab | Verilog | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

Analog | Analog IC | Analog IC Design | Analog-Amplifiers | Analog-Layout | Analog-LDO | Analog-Mixed Signal-DV | Analog-Modeling | Analog-Simulation | Analog-Verification | ASIC Design/Verification |

Martin Elaskar

Electronic engineering student. 24 years old. Currently doing a LNA design as thesis.

SKILLS

C/C++ | Matlab | Python |

AREA OF EXPERTISE

Academic: Student |

Kranthi Kumar Pamarthi

I am passionate about all areas of VLSI Design and trying my level best to be an expert in the entire flow, analog, digital and mixed signal. Beyond chips, I like poetry, skating, skydiving, late night swimming and trekking in no particular order.

SKILLS

Magic CAD | Matlab | Netgen | ngspice | Octave | Python | System Verilog | Tcl/Tk | Verilog | VHDL | perl |

AREA OF EXPERTISE

Academic: Research | Academic: Student | CAD: Scripting | Circuits: Filters | Digital: DFT | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis | Digital: Verification | Miscellaneous: Neural Networks | System: FPGA Programming |

Islam Hussein

SKILLS

Cadence Virtuoso | Calibre | Matlab | SKILL | Verilog |

AREA OF EXPERTISE

Analog: Design |

Tiago Oliveira Weber

SKILLS

Analog/Digital Circuit Design | C/C++ | Circuit Design | Matlab | System-C |

AREA OF EXPERTISE

Analog IC Design |

David Garner

An experienced mixed-signal IC design engineer / design manager with over 25 years experience. Has design and led the design of multiple mixed-signal ICs through to tapeout and silicon verification. Also experienced with the delivery of IP blocks. Worked across multiple market sectors.

SKILLS

Cadence Virtuoso | Diva | Leadership | Matlab | Octave | SKILL | Spectre |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | Business: Design Services | Business: Management | Business: Patents | Circuits: Communication | Circuits: Filters | Circuits: Power Management | Circuits: Sensors | Circuits: Signal Processing | SoC: ESD | SoC: Floorplanning | SoC: Verification | System: Chip Editing | System: Fabrication Process | System: Power Integrity | System: Quality Assurance | System: Signal Integrity | System: Test Equipment |

Rohit Yadav

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Electric CAD | Magic CAD | Matlab | Netgen | ngspice | Octave | Python | Scilab | SKILL | Spectre | SPICE Opus | System Verilog | System-C | Tcl/Tk | Verilog |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Modeling | Analog: Simulation | Analog: Verification | CAD: Scripting | Circuits: Microcontrollers | Circuits: Power Management | Circuits: Sensors | Circuits: Signal Processing |

Julio

RTL Engineer

SKILLS

C/C++ | Matlab | System Verilog | Verilog |

AREA OF EXPERTISE

Digital: RTL |

Marwan Mohamed

I am a senior Electronics and Communications Engineering student at the Faculty of Engineering, Ain Shams University, Cairo, Egypt. I have wide knowledge and some experience in analog electronics with huge passion towards it

SKILLS

Cadence Virtuoso | Matlab | ngspice | Python |

AREA OF EXPERTISE

Academic: Student |

Pablo Mendoza Ponce

SKILLS

C/C++ | Cadence Encounter | Cadence Virtuoso | Calibre | Matlab | ngspice | Octave | Python | Spectre | System Verilog | System-C | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Research |

Yashas L.R

Technical Blogger and a Research Assistant in the field of analog VLSI Design.

SKILLS

assura | Cadence Virtuoso | Diva | Electric CAD | Magic CAD | Matlab | Spectre | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Student | Analog: Design | Analog: Layout | Digital: RTL | System: FPGA Programming |

Mahmoud Gamal Deghadi

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SKILLS

C/C++ | Cadence Virtuoso | Eagle CAD | Eldo | Matlab | VHDL |

AREA OF EXPERTISE

Academic: Student |

George Fikos

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Matlab | Octave | Spectre |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Layout | Analog: Simulation | Analog: Verification | Circuits: Communication | Circuits: Filters | Circuits: Power Management | Circuits: Sensors | Circuits: Signal Processing | Miscellaneous: Neural Networks |

Daniel Holley

SKILLS

C/C++ | Eagle CAD | Matlab | ngspice | Software Developer |

AREA OF EXPERTISE

Circuits: Microcontrollers |

Shahbaz Abbasi

Design engineer with combined R&D and industrial experience in developing analog/mixed signal ICs for applications including inductive position sensors and imager readouts. Proven abilities with widely used blocks including (but not limited to) filter, amplifier, ADC, DAC, voltage regulators, bandgap reference, ring/LC oscillator, comparator and custom digital logic circuitry. Experience with full tape-out flow including schematic design, analog/mixed-signal simulations, floor planning, layout, system-level verification and chip measurements. Strong familiarity with industry standard tools and instruments used for design, verification and testing such as Cadence, Synopsys, Mentor Graphics, and Keysight. Frontend digital hardware design (ASIC/FPGA) experience using Verilog HDL. Considerable exposure to ASIC backend flow (synthesis and PnR) using Synopsys Design Compiler and Cadence Innovus. Skilled with programming platforms such as MATLAB, C++, C#, Perl, UNIX Shell and VB. Strong education with Ph.D. and MSc. degrees in Electronics Engineering along with several peer-reviewed articles in IEEE journals.

SKILLS

C/C++ | Cadence Encounter | Cadence Virtuoso | Calibre | Matlab | ngspice | Octave | Perl | Python | Scilab | Software Developer | Spectre | Tcl/Tk | Verilog |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | Business: Design Services | Circuits: Filters | Circuits: Sensors | Circuits: Signal Processing | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis | System: FPGA Programming | System: PCB | System: Test Equipment | System: Test Programming |

Mustafa Tosun

I am a digital design/verification engineer. I have 2 years of full-time industry experience. In total, I have 4.5 years of experience in RTL design, Electronic Design Automation and Verification using VHDL/Verilog, Perl, Tcl and Linux. I was the #1 graduate of Bahcesehir University in Mechatronics Engineering in 2013

SKILLS

C/C++ | Matlab | Perl | Python | Verilog | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

ASIC Design/Verification | Communication and Signal Processing | Design Automation | Digital-RTL |

Cong Nguyen

Technical consultant at Big Blue

SKILLS

Matlab | Noob | Software Developer |

AREA OF EXPERTISE

CAD-Dev |

Saul Rodriguez

I am Assistant Professor in Bio-Electronics. My research interests include analog mixed-signal ICs for medical applications, RFIC, and ultra-low power circuits.

SKILLS

C/C++ | Cadence Encounter | Cadence Virtuoso | Calibre | Matlab | ngspice | Verilog |

AREA OF EXPERTISE

Academic: Research | Academic: Teaching | Analog: Design | Analog: Layout | Analog: Modeling | Analog: Verification | Circuits: Communication | Circuits: Sensors |

Martin Simlastik

digital ASIC designer with 10+ yrs experience

SKILLS

Electric CAD | Matlab | Perl | Python | Software Developer | System Verilog | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

IC |

Hajime Suzuki

SKILLS

Analog CMOS Circuit | Analog IC Design | Matlab | Python | Verilog |

AREA OF EXPERTISE

Analog IC Design |

Mario Vigliar

Mad about OSS system design, specialized in video compression and image processing, CNN and dedicated HPC architectures. New deals in low power design

SKILLS

C/C++ | Circuit Design | Matlab | Python | Verilog | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

Digital-RTL | System-DSP | System-Filters |

Staf Verhaegen

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Matlab | Python | SKILL | Software Developer | Spectre | Verilog | VHDL |

AREA OF EXPERTISE

Open Source | SRAM | Standard Cells | Lithography |

Christopher Brian Young

SKILLS

C/C++ | Eagle CAD | Electric CAD | Hercules | Matlab | VHDL |

AREA OF EXPERTISE

Academic: Student |

Edab

SKILLS

C/C++ | Cadence Virtuoso | Eagle CAD | Matlab | Perl | Python | Software Developer | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Analog: Design | CAD: Scripting | Circuits: Communication | Circuits: Memory | Circuits: Microcontrollers | Circuits: Sensors | Circuits: Signal Processing | Digital: RTL | Miscellaneous: Neural Networks | System: FPGA Programming |

Taimur Rabuske

I am a senior researcher in INESC-ID, Lisbon.

SKILLS

Cadence Encounter | Cadence Virtuoso | Calibre | Eagle CAD | Matlab | Octave | Python | Software Developer | Spectre |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Layout | Analog: Simulation | Analog: Verification | CAD: Scripting | CAD: Tool Development | Circuits: Signal Processing |

MD AKRAMUDDIN

SKILLS

C/C++ | Matlab | Perl | Verilog | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

Digital-RTL |

Vishwajeet S B

I'm VLSI Design Engineer aspirant and like to work on design challenges in VLSI domain. I like to keep updated of cutting-edge technology in my field of interest.

SKILLS

Analog CMOS Circuit | Circuit Design | Matlab | Python | Verilog |

AREA OF EXPERTISE

Digital-RTL |

Ahmad Qassem Dawoud

SKILLS

Cadence Virtuoso | Calibre | Matlab | Perl | Spectre |

AREA OF EXPERTISE

Academic: Research | Analog: Design |

Syed Arsalan Jawed

I have been working on Analog/Mixed-Signal Integrated Circuits design since last 16 years. I graduated from NED UET, Karachi in 2001 and then worked with Avaz Networks, a Silicon-Valley Company on RTL design and verification of a high-density Line Echo Cancellation Engine for a couple of years. Joined Linkoping University, Sweden in 2003 for Masters in SOC, which concluded with a Masters Thesis on Sigma-Delta Modulators with Fraunhofer Institute of Integrated Circuits, Germany in 2005. The same year I joined University of Trento and Fondazione Bruno Kessler, Trento, Italy for my PhD on Readout Interface Design for MEMS Capacitive Microphones. Worked with ST-Microelectronics, Milano and Analog-Devices, Copenhagen as a Guest PhD Student. This Phd results in 20+ publications and 2 patents with 3 successful MEMS Readout ASICs.

SKILLS

Analog | Analog CMOS Circuit | Analog IC Design | Analog/Digital Circuit Design | C/C++ | Circuit Design | Matlab | Verilog | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

Analog | Analog IC | Analog IC Design | Analog-ADC | Analog-Amplifiers | Analog-Layout | Analog-Modeling | Analog-Simulation | Analog-Verification | ASIC Design/Verification | Digital-RTL |

Nimit Jain

SKILLS

Cadence Virtuoso | Matlab | Spectre |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Simulation | Circuits: Signal Processing | Digital: DFT |

Jhalak Sharma

SKILLS

Cadence Virtuoso | Matlab | Python | Verilog |

AREA OF EXPERTISE

Academic: Research |

MAYANK VASHISHT

Interested in Design, Verification, and Hand-off of Analog IPs. Worked on the definition, modeling, design, verification of DC-DC converters, Chargers, Ideal-Diodes, LDOs, Regulators, Bandgap references, Current limiting and sensing architectures. Excited for challenges in Analog Design, Layout and Post-silicon verification.

SKILLS

Cadence Virtuoso | Matlab | Octave | SKILL | Spectre | System Verilog | Verilog |

AREA OF EXPERTISE

Analog: Design | Analog: Modeling | Analog: Simulation | Analog: Verification | Circuits: Filters | Circuits: Power Management | Circuits: Signal Processing | Digital: Verification | SoC: ESD | System: Test Programming |

Aditya Gupta

SKILLS

Cadence Virtuoso | Matlab | Python | Verilog | VHDL |

AREA OF EXPERTISE

Circuits: Microcontrollers |

Jose Joaquin Mendoza

SKILLS

C/C++ | Matlab | Python | Verilog |

AREA OF EXPERTISE

Communication and Signal Processing |

Keith Raymond Fernandes

SKILLS

Cadence Encounter | Cadence Virtuoso | Matlab | Spectre | System Verilog | Verilog |

AREA OF EXPERTISE

Academic: Teaching |

Francisco Brito Filho

Electronic Engineer with experience in RF/AMS IC Design and other electronics and telecommunications projects. Served in working groups and also as leader. Has also experience in entrepreneurship. PhD in Microelectronics. Currently Adjunct Professor at Federal University of Semi-Árid Region - UFERSA and Head of LIEB/LAMERF Research Labs where develop R&D projects in the areas of instrumentation, biomedical engineering, RF/MW circuits and microelectronics.

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Eldo | Leadership | Matlab | ngspice | Octave | Python | Spectre | VHDL |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Modeling | Analog: Simulation | Analog: Verification | Circuits: Communication | Circuits: Sensors | Miscellaneous: Neural Networks | System: FPGA Programming | RF Circuits and Systems | RF IC Design | Microwaves |

Rafael Lima

SKILLS

C/C++ | Matlab | Python | Software Developer |

AREA OF EXPERTISE

Academic: Research | System: Test Programming |

Hossam Hassan

SKILLS

C/C++ | Cadence Encounter | Cadence Virtuoso | Matlab | Python | System Verilog | System-C | Verilog |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | Circuits: Microcontrollers | Circuits: Sensors | Circuits: Signal Processing | Digital: RTL | Digital: Synthesis | Digital: Verification | SoC: Verification | System: FPGA Programming | System: PCB |

Venkata Nitheesh Kumar Reddy Kethu

SKILLS

C/C++ | Eagle CAD | Matlab | Octave | System Verilog | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Research | Academic: Student | Circuits: Filters | Circuits: Signal Processing | Digital: RTL | Digital: Synthesis | Digital: Verification | System: FPGA Programming |

Tung Hoang

R&D Engineer

SKILLS

Cadence Encounter | Matlab | System Verilog | Verilog | VHDL |

AREA OF EXPERTISE

Digital: Placement and Routing | Digital: RTL | Digital: Synthesis | Digital: Verification | Miscellaneous: Neural Networks | SoC: Floorplanning |

Ping-Liang

SKILLS

Cadence Virtuoso | Matlab | Perl | Python | Spectre | Verilog | VHDL |

AREA OF EXPERTISE

Analog: Design |

Khalid Ali Eissa

Fresh grad electronics engineer and a beginner circuits designer who admires analog/RF IC design. Former intern at ADI© (Egypt) and recently a junior Analog IC designer at Si-Ware Systems (Egypt). My GP was a 5G Transceiver in the band 26.5GHz - 29.5GHz, I designed the upconversion mixer (core circuit, power combiner, LO driver).

SKILLS

Cadence Virtuoso | Calibre | Matlab | ADS | Sonnet |

AREA OF EXPERTISE

Academic: Student | Analog: Design | Analog: Layout | Analog: Simulation |

Jefferson Cardoso Ribeiro

SKILLS

Cadence Virtuoso | Calibre | Matlab | Spectre |

AREA OF EXPERTISE

Circuits: Power Management | Circuits: Sensors |

Sheung Lu

Graduate student working on CMOS based biosensors.

SKILLS

Cadence Encounter | Cadence Virtuoso | Matlab | Python | Spectre |

AREA OF EXPERTISE

Academic: Research | Academic: Student |

PEER MOHAMED

SKILLS

Analog CMOS Circuit | Analog IC Design | Analog/Digital Circuit Design | Matlab | Verilog | VLSI/ASIC and SoC Development |

AREA OF EXPERTISE

Analog IC Design | Analog-Modeling | Analog-Simulation | ASIC Design/Verification | Automatic Circuit Design | Communication and Signal Processing | Design Automation | Digital-DFT | signal processing | Analog-ADC | Digital-RTL |

Marco Merlin

Electronics Engineer with 10 years experience in microelectronics and research. Familiar with CMOS integrated circuits design, wireless communication systems, programming and lab environment, I am comfortable working for worldwide semiconductors firms. Passionate for high-tech and music, advocate for teamwork and collective intelligence to support a strong problem-solving methodology, I am curious, self-motivated, addicted to learning and re-shaping the new technologies I am exposed to. During my workday I aspire to address "real-life problems", hopefully continuing to develop my multi-disciplinary skills as a means for technical and personal enrichment.

SKILLS

C/C++ | Cadence Virtuoso | Eagle CAD | Matlab | Octave | Python | SKILL | System Verilog | Verilog | VHDL | wifi | bluetooth | LTE |

AREA OF EXPERTISE

Analog: Verification | Circuits: Communication | Circuits: Microcontrollers | Circuits: Sensors | Circuits: Signal Processing | Digital: RTL | Digital: Verification | Miscellaneous: Neural Networks | SoC: Verification | System: PCB | System: Test Equipment | System: Test Programming |

Mohamed Gamal Shouman

Working as a instruments engineer, and currently working on my masters of Microelectronic Systems Design. Passionate about designing analog/mixed signal IC's and systems

SKILLS

Analog CMOS Circuit | Analog IC Design | Circuit Design | Matlab |

AREA OF EXPERTISE

Academic: Research | Analog IC Design | Analog-Layout |

Chanaka Ashan Ganewattha

SKILLS

C/C++ | Eagle CAD | Matlab | Verilog |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Simulation | Circuits: Microcontrollers | Circuits: Signal Processing | System: Power Integrity | System: Signal Integrity |

Vincent Trudel-Lapierre

SKILLS

C/C++ | Matlab | Octave | Python | Scilab | System Verilog | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Digital: RTL | Digital: Verification | Miscellaneous: Cryptography | Miscellaneous: Neural Networks | System: FPGA Programming | System: PCB | System: Test Equipment |

Caio Alonso da Costa

SKILLS

C/C++ | Cadence Encounter | Matlab | System Verilog | Verilog | VHDL |

AREA OF EXPERTISE

Digital: RTL | Digital: Synthesis | Digital: Verification |

Lalith Kota

SKILLS

C/C++ | Cadence Virtuoso | Matlab | Octave | Python | Software Developer | Verilog |

AREA OF EXPERTISE

Academic: Student |

Netsanet gebeyehu

Analog/RF/Digital design manager

SKILLS

Cadence Virtuoso | Calibre | Matlab | Verilog |

AREA OF EXPERTISE

Analog: Design | Digital: RTL |

Alex Sheldon

Electrical Engineering PhD Student focusing on low noise analog and RF circuits

SKILLS

Analog CMOS Circuit | Analog IC Design | Circuit Design | Matlab | RF |

AREA OF EXPERTISE

Academic: Research | Analog IC Design | RF |

Mahmoud Youssuf Ahmad

Graduate student of ECE department Ain Shams University, and Currently Master Student of ECE department Cairo University with major of Electronics design.

SKILLS

C/C++ | Cadence Encounter | Cadence Virtuoso | Calibre | Eagle CAD | Matlab | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Research | Analog: Design | Analog: Layout | CAD: Scripting | Digital: Placement and Routing | Digital: RTL | Digital: Synthesis | SoC: Floorplanning | System: FPGA Programming |

Niels Moseley

SKILLS

C/C++ | Cadence Encounter | DSP | Matlab | Python | Software Developer | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Research | Digital: RTL | System: FPGA Programming |

M Aznan Firmansyah B

real engineer

SKILLS

Analog IC Design | C/C++ | Circuit Design | Matlab | Python | Scilab | Software Developer |

AREA OF EXPERTISE

Design Automation | Industrial Engineering |

Bertrand PIGEARD

Hello, I'm an IC Designer Analog/RF with digital skills. I worked mainly on PLL for mobile tranceivers. I used to work on Cadence Design flow for 20 years.

SKILLS

C/C++ | Cadence Virtuoso | Calibre | Diva | Matlab | ngspice | Octave | Perl | Python | Scilab | SKILL | Spectre | Tcl/Tk | Verilog | VHDL |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification | CAD: Scripting | CAD: Tool Development | Circuits: Communication | Circuits: Memory | SoC: Floorplanning |

Iago Sergio Pinheiro Pereira

SKILLS

C/C++ | Cadence Virtuoso | Electric CAD | Matlab | Octave | Python | VHDL |

AREA OF EXPERTISE

Academic: Student | Analog: Design | Analog: Simulation | Circuits: Signal Processing |

Bob Ledzius

35 years mixed signal SoC, ASIC, and FPGA design and management experience. Concertal provides rapid functional IP integration using proprietary System Design Automation technology that includes delivery of RTOS capable fabric that supports loosely coupled HW operation including IP NbC (Network beyond the Chip). IP areas of expertise include common interfaces, data converters, modulators, digital filters, DSP, processors, FSM, and other custom specified functionality.

SKILLS

C/C++ | Leadership | Matlab | System Verilog | Tcl/Tk | Verilog |

AREA OF EXPERTISE

Business: Design Services | Business: Management | Business: Patents | CAD: Scripting | CAD: Tool Development | Circuits: Filters | Circuits: Microcontrollers | Circuits: Signal Processing | Digital: RTL | Digital: Verification | Miscellaneous: Cryptography | SoC: Verification | System: FPGA Programming | System: PCB |

Ankit Adesara

SKILLS

Cadence Virtuoso | Eldo | Magic CAD | Matlab | Perl | Scilab | Tanner L-Edit | Verilog | VHDL |

AREA OF EXPERTISE

Academic: Teaching | Analog: Design | Analog: Layout | Analog: Simulation | Circuits: Memory | System: FPGA Programming |

Arshath Sheeparamatti

SKILLS

Analog/Digital Circuit Design | Matlab |

AREA OF EXPERTISE

ASIC Design/Verification |

Emre Kırkaya

PhD candidate on digital electronics

SKILLS

C/C++ | Matlab | Verilog |

AREA OF EXPERTISE

Digital-RTL |

Luis Enrique Rodriguez Mecca

Analog IC designer with knowledge and experience related to topics in analogl full-custom IC design such as current mirrors, single and differential amplifiers, bandgaps circuits and charge pump.

SKILLS

Analog CMOS Circuit | Analog IC Design | Matlab | Python | Verilog |

AREA OF EXPERTISE

Analog IC | Analog-Amplifiers | Analog-Layout |

Mark Martin

Principal Staff Engineer, ASIC Design and Development, Chief Technologist, JHU/APL Space Exploration Sector, Electronic Systems Engineering group

SKILLS

Magic CAD | Matlab | Netgen |

AREA OF EXPERTISE

Analog: Design | Analog: Layout | Analog: Modeling | Analog: Simulation | Analog: Verification |

Baris Volkan Yildirim

Design engineer

SKILLS

Analog CMOS Circuit | Analog IC Design | Eldo | Matlab | Python | System Verilog |

AREA OF EXPERTISE

Academic: Research | Analog-Amplifiers | Analog: Design | Analog: Modeling | Analog: Verification | Business: Sales | Circuits: Filters | Circuits: Power Management |

Mohamed Hassaneen Abd-elghafar Hassaneen Amer

I am an Analog design engineer graduated from Ain-shams university in 2018. My graduation project was to design a Decision Feedback Equalizer in a 10 Gb/s serial link transceiver, starting from building the circuit from scratch to layout and post layout simulations and system integration.

SKILLS

C/C++ | Cadence Virtuoso | Matlab |

AREA OF EXPERTISE

Analog: Design | Analog: Layout |

Ajit Kumar

SKILLS

Calibre | Eldo | Matlab | Tanner L-Edit |

AREA OF EXPERTISE

Analog: Design | Analog: Layout |

Rod

I'm an engineer with experience in analog IC design both in private companies as well as academia. Experienced in design of delay locked loop(DLL), clock recovery, field detectors, voltage limiters, operational amplifiers, current mirrors, bandgap reference and so on.