Analog systems and circuit design engineer with extensive product development and applications experience with a strong focus on end markets. Proven ability to work closely with a diverse set of customers and clients to properly specify the requirements of a mixed-signal ASIC. Ability to manage product development from foundry selection through design, tape-out, and mass-production.
i'm expert analog mixed signal IC design engineer 7 years experience
HW development engineer
I've been worked as an Electrical Engineer for more than 20 years. I'd like to bring Artificial Intelligence to the EE design so that it can be "Self-driving".
I am an electronic hobbyist who enjoys building different electronic circuits and systems.
Experienced Analog Design Engineer with strong background in HV CMOS ASICs.
Interested in Design, Verification, and Hand-off of Analog IPs. Worked on the definition, modeling, design, verification of DC-DC converters, Chargers, Ideal-Diodes, LDOs, Regulators, Bandgap references, Current limiting and sensing architectures. Excited for challenges in Analog Design, Layout and Post-silicon verification.
Passionate about engineering and electronics. Love teaching and mentoring. Highly experience in analogue and RF electronics and enjoy managing projects.
I'm an engineer with experience in analog IC design both in private companies as well as academia. Experienced in design of delay locked loop(DLL), clock recovery, field detectors, voltage limiters, operational amplifiers, current mirrors, bandgap reference and so on.
An experienced mixed-signal IC design engineer / design manager with over 25 years experience. Has design and led the design of multiple mixed-signal ICs through to tapeout and silicon verification. Also experienced with the delivery of IP blocks. Worked across multiple market sectors.
Experienced leader of industry and academia focusing on developing customized hardware accelerators for low power mobile, AI and IoT devices. Over 20-years hands-on experience in all aspects of SOC and processor design. Specialties: memory design (SRAM, regfile, CAM), VLSI design for best Power, Performance, and Area (PPA) design point. Power management and power conversion including dc/dc and ac/dc. Computer Architecture and Hardware accelerator using In-Memory-Computing and Emerging Technologies (RRAM)
Masters in "Integrated Circuits & Systems" focused on Analog / Mixed Signal System/ IC design
Professor of CSE at UC Santa Cruz
I am an Associate Professor teaching VLSI design, hardware security, and digital circuit design at Drexel University. My research interests include analysis, modeling, and design methodologies for high performance digital and mixed-signal integrated circuits, power management for SoC and microprocessor circuits, hardware security, including digital and analog obfuscation and Trojan detection, and electric and thermal modeling and characterization, signal and power integrity, and power and clock delivery for heterogeneous 2-D and 3-D circuits.
SoC Architect.Technologist. Hands-on experience in complex low power SoC designs, from concept to production. Excellent track record in successful development and production of ASICs, Technologies: Bluetooth, WLAN, IoT, Gigabit Ethernet, EPON networks, Interface ICs, Broadcast TV and Communication controllers. Demonstrated consistent track record of first-pass silicon success. PhD in Low power VLSI. Recipient of US and Indian patents. Core Competency: Chip Architecture, Micro Architecture, logic design, RTL Verilog coding, Chip level verification, Static Timing analysis, Formal Verification, design rule checking, AXI, AHB and APB bus protocols, Digital ASIC methodology, DFT methodology, Low Power ASIC design, Interfacing with backend teams, Timing closure, Post silicon bring up and validation, Project Planning, Scheduling and Management, FPGA Prototyping. Author of Book "A Practical Approach to VLSI System on Chip (SoC) Design" published by Springer Nature. Domain experience: Communications, EPON, WLAN, Bluetooth, IoT, Healthcare, Nextgen TV, Automotive. Managed dynamic, cross cultural teams of size 40 to 100. Standards worked on IEEE802.3, IEEE802.11b, ac, ad. ATSE 3.0, Automotive ethernet, Bluetooth Quality standards: ISO 9002, ISO 13485, IEC 60601-2 Funded Research: Derivative Low power standard cell library development PhD Guidance: 2 one in Asynchronous VLSI design methodology and second in Sub 1V power supply for complex SoCs. Co-founded healthcare company:Sensesemi Technologies Pvt. Ltd. Academic research head and taught engineering students for their undergrad, Post grad and PhD courses Chair, IEEE NanoTechnology Council, Bangalore Section as a founder Chairperson, Current Senior IEEE member.
Pham Van Khoa received the B.S. degree in Computer Technology and PhD. degree in Electronic Engineering from the University of Technology and Education, Vietnam and Kookmin University, Korea, respectively. In 2010, he joined ICDREC (Integrated Circuit Design Research and Education Center), where he was engaged in the development of VN8-01 MCU, the first commercial micro-controller fully designed and fabricated by Vietnamese. In 2011, he joined University of Technology and Education HCMC, where he is currently a senior lecturer at Department of Computer and Communication Engineering. His research interests include Low-power VLSI solutions for Memory, Energy Harvesting, Memristor-based Neuromorphic Computing Systems, Neural Network Accelerators and MP-System-on-Chip based designs.
hi, i am jawad. I have done my bachelors in electrical engineering from UET Lahore, Currently, as a research student, i am interested in SoC's. My future goals is to develop expertise in analog, mixed signal and RF circuits designs.
RF/Analog IC design and SOC
I am a Ph.D. student at the Faculty of Engineering Sciences, University College London. My Ph.D. research focuses on the System-on-Chip design of power electronic converters.
Technology development in intergrated analog circuits. I'm available to design analog and mixed-signal circuits as an external contractor.
An energetic semiconductor professional with varied experience in the field of research, teaching and IC design. 📌 More than 6 years of experience in analog and mixed signal IC design. 📌 3 years of mentoring experience in analog circuit and layout design. 📌 Been part of the 4 complete IC development project. 📌 Inventor and co-inventor of 2 patents (filed) in the field of high-speed data path communication. 📌 Published few research papers with more than 30 engineering citations. 📌 6 month experience as a lead role in standard cell library development in a leading semiconductor organisation. 📌 more than 4 years of teaching experience in under-graduate electronics engineering courses.
Provides mixed-signal CMOS training to academia using open-source tools and also solution for the consumer and automotive industry.
President and CEO
An analog mixed-signal circuit designer for low-power precision sensor interfaces. See https://staff.aist.go.jp/ippei.akita/
IC designer with more than 25 years post Ph.D. experience. Specialising in RF, RFIC, analog and mixed-signal. Wide experience in Architecture, system and circuit design. RF front-end module design for cellular with CMOS PA. Over 40 patents issued.
Analog mixed signal Asic design
Adroitec Systems is design Services Company for the VLSI and Embedded Software. Founded in 2017, Adroitec Systems is having Register Office at Visakhapatnam with branch offices in Bangalore. Adroitec Systems delivers cutting edge solutions across a diverse portfolio of services including Physical Design, Physical Verification, and Design Verification. With about 50 highly qualified employees.