Linkedin - https://www.linkedin.com/in/bhawandeep-singh-1b164517/ PhD student in CSE department in UCSC, advised by Prof. Jose Renau. My areas of majors are CPU design, digital design and embedded software.
I am an Electronics Engineer with experience in IT Management, Firmware Development and Education. I spend my spare time looking for interesting projects and reading about technology trends.
MS IC Designer, focusing on imager design in deep submicron technologies
I am researcher with goals of developing high end technologies for the future.
José T. de Sousa holds a PhD degree from Imperial College London (1998) and has been a university lecturer and researcher at Lisbon University (1999-present). He holds 4 international patents, is co-author of one book, and was General Chair of the Field Programmable Logic and Applications Conference in 2013. Dr. de Sousa has published more than 70 technical papers in international journals and conferences. He was co-founder and CEO of Coreworks, a semiconductor intellectual property company, which he ran from 2001 to 2013. His specialties are digital circuit design, hardware/software architecture, technical team management and semiconductor IP marketing and sales.
Electronics Engineer and Researcher with a demonstrated history of working in the higher education industry. Skilled in CAD/EDA tools for ASIC, PCB and FPGA design, scripting and programming. Education professional with a PhD in Electrical Engineering and Computer Science from University of Nis, Faculty of Electronic Engineering Nis, Serbia.
Hugo Hernández received his B.S. degree in Electronic Engineering from The Industrial University of Santander, Colombia in 2005 and M.S. degree in Electrical Engineering from Polytechnic School of the University of São Paulo (EPUSP), Brazil in 2008. Hugo obtained his Ph.D degree in Electrical Engineering from University of São Paulo in 2015. He was Mixed Signal IC designer at LSITEC and DFCHIP (Brazil) where worked for 8 years, and Pos-doc of the Universidad de Sao Paulo in collaboration with ALICE-CERN as analog IC designer in the SAMPA ASIC project. He was Adjunct Professor of the Control and Automation course at the Engineering Institute (CUVG) of UFMT for 2 years. He is currently Adjunct Professor of the Department of Electrical Engineering of the Federal University of Minas Gerais (UFMG).
I am Assistant Professor in Bio-Electronics. My research interests include analog mixed-signal ICs for medical applications, RFIC, and ultra-low power circuits.
I'm an engineer with experience in analog IC design both in private companies as well as academia. Experienced in design of delay locked loop(DLL), clock recovery, field detectors, voltage limiters, operational amplifiers, current mirrors, bandgap reference and so on.
Research engineer and teaching assistant in microelectronic, microsystems and bioelectronic at the university of Liège, Belgium
Experienced leader of industry and academia focusing on developing customized hardware accelerators for low power mobile, AI and IoT devices. Over 20-years hands-on experience in all aspects of SOC and processor design. Specialties: memory design (SRAM, regfile, CAM), VLSI design for best Power, Performance, and Area (PPA) design point. Power management and power conversion including dc/dc and ac/dc. Computer Architecture and Hardware accelerator using In-Memory-Computing and Emerging Technologies (RRAM)
Design engineer with combined R&D and industrial experience in developing analog/mixed signal ICs for applications including inductive position sensors and imager readouts. Proven abilities with widely used blocks including (but not limited to) filter, amplifier, ADC, DAC, voltage regulators, bandgap reference, ring/LC oscillator, comparator and custom digital logic circuitry. Experience with full tape-out flow including schematic design, analog/mixed-signal simulations, floor planning, layout, system-level verification and chip measurements. Strong familiarity with industry standard tools and instruments used for design, verification and testing such as Cadence, Synopsys, Mentor Graphics, and Keysight. Frontend digital hardware design (ASIC/FPGA) experience using Verilog HDL. Considerable exposure to ASIC backend flow (synthesis and PnR) using Synopsys Design Compiler and Cadence Innovus. Skilled with programming platforms such as MATLAB, C++, C#, Perl, UNIX Shell and VB. Strong education with Ph.D. and MSc. degrees in Electronics Engineering along with several peer-reviewed articles in IEEE journals.
Adjunct professor at Federal University of Itajuba in Itabira, Brazil. Experience in the design of Analog and RF integrated circuits.
I am a Master's student who has to know for learning and do experiments as well as for writing technical blogger. My website links are given below to connect with my open-source family of the VLSI champions. https://nishitnathwani.blogspot.com/ https://geniusvlsi.blogspot.com/
I am an electrical engineer, who earned PhD from University of Toronto in 1982. I have been working as a teacher, a researcher and an administrator for more than 46 years. I started as a lecturer in March 1975 and attained the highest academic rank of professor in April 1988 in UET Lahore at its Taxila Campus. I retired as a tenured professor on 17 October 2012 from UET Taxila and have been in service to GIKI as professor in FES since 19 December 2012. I served as Vice Chancellor UET Taxila from 2001 to 2009. I helped the establishment of prestigious institutions namely Center for Advanced Studies in Engineering (CASE) Islamabad, University of Lahore, Wah Engineering College, IIEC Islamabad, KRL Institute and HITEC university Taxila. In 1993 I served Pakistan Telecommunication Corporation on deputation as General Manager, CTRL and also established Institute of Communications Technologies (ICT), Islamabad as its founder Principal.
Researcher and Professor at the National University of Córdoba, Argentina. Actual Research areas: microelectronics, embedded systems, Digital Signal Processing
Professor of CSE at UC Santa Cruz
I am an Associate Professor teaching VLSI design, hardware security, and digital circuit design at Drexel University. My research interests include analysis, modeling, and design methodologies for high performance digital and mixed-signal integrated circuits, power management for SoC and microprocessor circuits, hardware security, including digital and analog obfuscation and Trojan detection, and electric and thermal modeling and characterization, signal and power integrity, and power and clock delivery for heterogeneous 2-D and 3-D circuits.
SoC Architect.Technologist. Hands-on experience in complex low power SoC designs, from concept to production. Excellent track record in successful development and production of ASICs, Technologies: Bluetooth, WLAN, IoT, Gigabit Ethernet, EPON networks, Interface ICs, Broadcast TV and Communication controllers. Demonstrated consistent track record of first-pass silicon success. PhD in Low power VLSI. Recipient of US and Indian patents. Core Competency: Chip Architecture, Micro Architecture, logic design, RTL Verilog coding, Chip level verification, Static Timing analysis, Formal Verification, design rule checking, AXI, AHB and APB bus protocols, Digital ASIC methodology, DFT methodology, Low Power ASIC design, Interfacing with backend teams, Timing closure, Post silicon bring up and validation, Project Planning, Scheduling and Management, FPGA Prototyping. Author of Book "A Practical Approach to VLSI System on Chip (SoC) Design" published by Springer Nature. Domain experience: Communications, EPON, WLAN, Bluetooth, IoT, Healthcare, Nextgen TV, Automotive. Managed dynamic, cross cultural teams of size 40 to 100. Standards worked on IEEE802.3, IEEE802.11b, ac, ad. ATSE 3.0, Automotive ethernet, Bluetooth Quality standards: ISO 9002, ISO 13485, IEC 60601-2 Funded Research: Derivative Low power standard cell library development PhD Guidance: 2 one in Asynchronous VLSI design methodology and second in Sub 1V power supply for complex SoCs. Co-founded healthcare company:Sensesemi Technologies Pvt. Ltd. Academic research head and taught engineering students for their undergrad, Post grad and PhD courses Chair, IEEE NanoTechnology Council, Bangalore Section as a founder Chairperson, Current Senior IEEE member.
My area of interest is Analog and Mixed signal circuit design. I teach Electronic Circuit, VLSI design and Signals & Systems for under graduate students and Analog Integrated Circuit Design, Data Converters and Clock & power management circuit courses for Masters students. I also teach VLSI lab courses for both both undergraduate and masters students. Every year I supervise both undergraduate and masters students in analog circuit design projects. Presently I am involved in SRC project as Co-task leader in Analog and Mixed Signal circuit verification project using Machine learning techniques.
I have been a Professor in The Dept. of Electronics and Communication, College of Engineering, Guindy (CEG), Anna University, Chennai, India and I have retired last year after being on the faculty of this University for twenty eight years. I continue to teach courses as a Guest Faculty in the same Dept. at CEG, Anna University in the areas of Analog, Mixed Signal, RF and Communication Systems and IC Design. I have supervised student teams in building Small Satellites (Avionics subsystems) and also CMOS IC Designs. I have also supervised Masters and Doctoral thesis in the areas of GPS (baseband), uP Clock PLLs and CDRs, RF LNAs, and resonant sensors.
Technology development in intergrated analog circuits. I'm available to design analog and mixed-signal circuits as an external contractor.
Post-doctoral research fellow in the discipline of Software and Systems, School of Computer Science and Statistics, Trinity College Dublin, with a keen interest in learning new things, specially related to computer science and engineering. Around 4 years experience of teaching and research and more than 10 years of experience in architecture design, optimization, analysis, implementation and verification of digital and digital signal processing systems on FPGAs and ASICs. Diversifying research career by working on quantization of deep convolution neural networks. Author of three peer reviewed journal publications and five international conference publications.
An energetic semiconductor professional with varied experience in the field of research, teaching and IC design. 📌 More than 6 years of experience in analog and mixed signal IC design. 📌 3 years of mentoring experience in analog circuit and layout design. 📌 Been part of the 4 complete IC development project. 📌 Inventor and co-inventor of 2 patents (filed) in the field of high-speed data path communication. 📌 Published few research papers with more than 30 engineering citations. 📌 6 month experience as a lead role in standard cell library development in a leading semiconductor organisation. 📌 more than 4 years of teaching experience in under-graduate electronics engineering courses.
Provides mixed-signal CMOS training to academia using open-source tools and also solution for the consumer and automotive industry.
I am designed mixed signal ICs for Music, Audio, IoT and sensor applications.
TAKASU Masakazu, Support Maker Faire Shenzhen and Singapore Maker carnival Shanghai and some event, takes us on a journey to his homeland of Japan and their exciting ways of using technology, design and science. He is the most experienced person of Maker Faire in Asia, now based in Shenzhen. He is also connected all around Makers, even in Asia and Japan.His company Switch Science is the most famous maker tool platform in Japan, and also DIY Indie product marketplace. Japanese DIY product grown so rapidly 20 percent per year. His Own book ECOSYSTEM BY MAKERS is well known in Japan, and He also translated 'the Hardware Hacker` book in Japanese and published. That book by Bunnie Huang, who is a world famous Hardware hacker. https://www.linkedin.com/in/takasumasakazu
Ph.D. in electrical engineering, 25 years experience in mixed-signal IC design
Mixed-Signal Integrated Circuits instructor and researcher.
I'm a Senior Researcher at the Barcelona Supercomputing Center and Junior Faculty at Polytechnic University of Catalonia (UPC). I'm the recipient of the RISC-V Educator of the Year Award 2019, for the advanced graduate course Processor Design I'm teaching at UPC, which is focused on the design of high-performance safety-critical systems. I'm the PI of the GPU4S project funded by the European Space Agency (ESA) in which we are investigating the applicability of embedded GPUs in space.
I am a professor at Federal University of Juiz de Fora (UFJF). I'm interested on analog and mixed-signal integrated circuits, as well as analog and digital electronics and microprocessors.
I am a professor of Neuroprosthetics at Newcastle University. My primary interest is in developing implantable medical devices to treat neurological conditions.
DR. PETER BERMEL is an associate professor of Electrical and Computer Engineering at Purdue University. He is the PI for the SCALE project, which aims to perform workforce development in microelectronics. His research focuses on improving the performance of photovoltaic, thermophotovoltaic, and microelectronic systems using the principles of nanophotonics. Key enabling techniques for his work include electromagnetic and electronic theory, modeling, simulation, fabrication, and characterization.
Enthusiastic VLSI Design Engineer currently working in Domain Specific Architectures