profiles search for area of expertise: Digital-DV
18 results
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AREA OF EXPERTISE
Tim Edwards
Developer of open source EDA tools on Open Circuit Design
SKILLS
AREA OF EXPERTISE
- Analog | Analog IC | Analog IC Design | Analog-Layout | Analog-Mixed Signal-DV | Analog-Simulation | Analog-Verification | ASIC Design/Verification | Automatic Circuit Design | CAD-Dev | CAD-Scripts | Communication and Signal Processing | Cryptography | Design Automation | Digital-DFT | Evolutionary algorithm | signal processing | SOC-DV | SOC-ESD | SOC-Packaging | System-PCB | System-Signal-Integrity | Analog-ADC | Analog-LDO | Digital-BE | Digital-DV | Digital-RTL | System-DSP | System-Filters |
Shriniket Sawant
Recent college graduate from San Jose State University with Masters in Electrical Engineering degree.
Specialization - Digital Design and Verification.
AREA OF EXPERTISE
Sun
Engineer, who typically worked in start up environment. So do A-Z, a-z and 1 - infinity if something has to work
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AREA OF EXPERTISE
Jakk srinath
AREA OF EXPERTISE
MADHUSHREE
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AREA OF EXPERTISE
SANJAIKUMAR K
AREA OF EXPERTISE
jatindersingh
SKILLS
- Analog/Digital Circuit Design | C/C++ | Electric CAD | Magic CAD | ngspice | Python | System Verilog | System-C | Tcl/Tk | Verilog | VHDL | VLSI/ASIC and SoC Development |
AREA OF EXPERTISE
- Analog-SMPS | Analog: Simulation | Analog: Verification | Circuits: Memory | Circuits: Microcontrollers | Circuits: Power Management | Circuits: Sensors | Circuits: Signal Processing | Digital-DV | Digital-RTL | Digital: DFT | Digital: Placement and Routing | Miscellaneous: Neural Networks | SOC-DV | SoC: ESD | SoC: Floorplanning | SoC: Verification | System-DSP | System: Chip Editing | System: FPGA Programming |
Hardik Manocha
Intern with Synopsys VIP Group, Working on HDMI VIP Development
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Sudhakar REddy Amireddy
DV and eDA
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Janak
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AREA OF EXPERTISE
Deepak Siddharth Parthipan
I am Digital/SoC Design and Verification enthusiast.
SKILLS
- C/C++ | Noob | Perl | Verilog | VLSI/ASIC and SoC Development |
AREA OF EXPERTISE
- Digital-DFT | SOC-DV | Digital-DV | Digital-RTL |
BZERROUK
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AREA OF EXPERTISE
Stepan Sutula
I received the B.S. degree in Industrial Electronics Engineering from the Universitat Politècnica de Catalunya, Spain, in 2007, and the M.S. degree in Micro- and Nanoelectronics Engineering in 2009 and the Ph.D. degree in Microelectronics and Electronic Systems in 2015 both from the Universitat Autònoma de Barcelona, Spain. From 2006 to 2008, I was with Investigation Total Ware, S.A., Spain, where I was engaged in analog and mixed-signal circuit design for highly reliable wireless telecommunication systems. From 2008 to 2015, I was with the Integrated Circuits and Systems design group at the Institut de Microelectrònica de Barcelona, CNM, CSIC, Spain, designing low-power high-precision mixed-signal ASICs for integrated smart sensors and IP blocks. From 2015 to 2016, I was with Broadcom Ltd., Barcelona, Spain, developing low-power CMOS IPs like low-temperature-drift oscillators, varible-temperature-coefficient current/voltage generators, temperature sensors, cross-domain level shifting and biasing circuits, touch-sensor transmitter drivers. I am co-author of 12 publications and participant in several research and industrial projects using a wide range of CMOS technology nodes. I am recipient of the 2007 Highest Grade Point Average in the Graduating Class Award, the 2014 Best Paper Award and the 2015 Student Best Paper Award Honorable Mention. My skills include: high-performance continuous-time/switched-capacitor circuits such as low-power high-resolution ADCs/DACs using Class-AB OpAmps; system high-level modeling (SciPy/Sage, Matlab); system electrical-level modeling (Verilog/-A/-AMS); EKV circuit-level modeling; full-custom IC design cycle (gEDA Tools/Cadence Virtuoso: from schematics to layout and verification); development of low-noise and low-distortion test equipment (including microcontrollers and FPGAs) and software (using C++, Tcl, VB, Python); and, experimental IC measures and parameter extraction.
SKILLS
AREA OF EXPERTISE
- Analog | Analog IC | Analog IC Design | Analog-Amplifiers | Analog-Layout | Analog-Mixed Signal-DV | Analog-Modeling | Analog-Simulation | Analog-Verification | ASIC Design/Verification | Automatic Circuit Design | CAD-Dev | CAD-Scripts | Communication and Signal Processing | Design Automation | Industrial Engineering | signal processing | SOC-DV | SOC-Packaging | System-PCB | System-Power-Integrity | System-Signal-Integrity | Analog-ADC | Analog-LDO | Digital-DV | System-Filters |
Clifford Wolf
Author of Yosys, IceStorm, PicoRV32, and other Open Source things
SKILLS
- C/C++ | Circuit Design | Python | Software Developer | Verilog |
AREA OF EXPERTISE
Driss Ben Zoubeir
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AREA OF EXPERTISE
Wessam Ahmed
Senior ASIC Design Engineer
AREA OF EXPERTISE
Matthew Ernest
VLSI circuit design engineer with significant experience in microprocessor design in semiconductor processes from 65nm to 10nm.
Provided register file designs and design training for Intel Big Core and SOC projects. Helped create semi-automated array layout methodology. Established cross-organizational methodology for variation analysis in register files. Converged memory IP handling across multiple organizations.