Syed Arsalan Jawed
I have been working on Analog/Mixed-Signal Integrated Circuits design since last 16 years. I graduated from NED UET, Karachi in 2001 and then worked with Avaz Networks, a Silicon-Valley Company on RTL design and verification of a high-density Line Echo Cancellation Engine for a couple of years. Joined Linkoping University, Sweden in 2003 for Masters in SOC, which concluded with a Masters Thesis on Sigma-Delta Modulators with Fraunhofer Institute of Integrated Circuits, Germany in 2005. The same year I joined University of Trento and Fondazione Bruno Kessler, Trento, Italy for my PhD on Readout Interface Design for MEMS Capacitive Microphones. Worked with ST-Microelectronics, Milano and Analog-Devices, Copenhagen as a Guest PhD Student. This Phd results in 20+ publications and 2 patents with 3 successful MEMS Readout ASICs.
Mar 21, 2017
The XBG_1V23LC_V01 is an embedded ultra-low power bandgap reference block which operates with 3.3V power supply. In Standby Mode (PDn = 'L') the power consumption is minimal, VBG will be pulled to ground level. The bandgap IP will be activated with the rising edge of signal PDn (PDn = 'H') and generates an output voltage of 1.23V on pin VBG. The output voltage can be trimmed via signals TR_BG[3:0] in 16 steps. The default combination is 4'b0000.