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RAVEN_SOC
Summary
RAVEN_SOC
community
efabless engineering
Hard IP
180nm
efabless
X-FAB
EFXH018D
Bandgap
Licensing
$0
$0
Maturity
layout
36
Library Package
11.0
Jul 25, 2018
Certifications
Description
The Raven-SoC is the synthesized digital core of a full-chip implementation of the PicoSoC PicoRV32 RISC-V CPU, in X-Fab XH018. It contains the CPU and digital subsystems for GPIO, UART, Flash SPI control, SRAM control, and control of a number of analog subsystems defined by the Raven chip.
Features
- 16 channel GPIO
- UART
- QSPI flash controller
- SRAM interface
Figure(s)
Parameters
Physical Parameters
PARAMETER | MINIMUM | TYPICAL | MAXIMUM | UNITS |
---|---|---|---|---|
device_area | µm² | |||
area | µm² | |||
width | µm | |||
height | µm | |||
DRC_errors | ||||
LVS_errors |