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SK-LVDS-IO-RXT016FFC

Sankalp

Sankalp Semiconductor offers SSLVDS_IO_RXT016FFC general purpose IOs targeted for TSMC 16nm FFC process (with 7-2-2 Metal Stack). It uses LVT, SVT thin-oxide 1.0V and 1.8V transistors, there is no deep Nwell requirement. It operates on a core supply of 0.8 /1.0 V and I/O supply 1.8 V. Contain two cell variants of LVDS Receiver , one with internal 100 ohm termination (LVDS18_RX_TERM) and one without internal termination (LVDS18_RX_NOTERM). All cells are power supply sequence independent.

 

  • Implemented in TSMC 16nm FFC CMOS process using 7-2-2 Metal Stack
  • Uses LVT, SVT core and 1.8V SVT transistors.
  • Targeted for flip-chip packages
  • Compatible with ANSI/TIA/EIA-644-A-2001 LVDS Standard
  • Compatible with IEEE 1596.3-1996 Standard for LVDS Scalable Coherent Interface
  • Powered from 1.8V +/- 7.5% IO supply and 0.8V +/- 10% or 1.0V -10% & +5% Core supply
  • Operates in junction temperature ranges from -40 to 125 degree Celsius
  • No power supply sequence restrictions
  • Receiver cell size is 50um X 255um (Drawn dimensions)
  • Inbuilt De-cap of around 3pF on VDDO
  • Input Receive sensitivity of 100mV differential with 25mV hysteresis
  • Input voltage range from 0V to 2.4V
  • Supports inputs differential voltage of 1V
  • Available in two I/O pad GDSII variants, one with termination (LVDS18_RX_TERM) and one without termination (LVDS18_RX_NOTERM)
  • ESD immunity of 2KV HBM, 250V CDM and +/- 100mA current injection for latch up
  • Maximum Input leakage current of < 30uA during the power-on and < 60uA during the power-off conditions
  • Supports both DC coupled and AC coupled Signals
  • For DC coupled signal Input common mode range support (0V to 2.4V) and for AC coupled signal Input common mode to be internally defined

Summary

Catalog ID

SK-LVDS-IO-RXT016FFC

IP Provider

design house

Designer

Sankalp

Type

Hard IP

Node

16nm

Vendor

Sankalp

Foundry

TSMC

Process

FFC

Category

General Purpose I/O

Certifications

icon

Licensing

Info

Contact Designer

Maturity

Stage

product

# of Tries

0

Library Package

Version

1.0

Version Date

Oct 01, 2018