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EF16 SPI controller

  • General-purpose SPI slave controller
  • 4 general-purpose 8-bit input registers
  • 12 general-purpose 8-bit output registers

Pins

Name Description Type Direction Vmin Vmax
SCK SPI clock input signal input -0.5 VDD + 0.3
RST SPI master reset signal input -0.5 VDD + 0.3
CSB SPI chip select (sense inverted) signal input -0.5 VDD + 0.3
SDI SPI data input signal input -0.5 VDD + 0.3
SDO SPI data output (tristate) signal output -0.5 VDD + 0.3
sdoena SPI data output enable (sense negative) signal output -0.5 VDD + 0.3
inreg4<7:0> General-purpose digital input (8 bits) digital input -0.5 VDD + 0.3
inreg5<7:0> General-purpose digital input (8 bits) digital input -0.5 VDD + 0.3
inreg6<7:0> General-purpose digital input (8 bits) digital input -0.5 VDD + 0.3
inreg7<7:0> General-purpose digital input (8 bits) digital input -0.5 VDD + 0.3
outreg8<7:0> General-purpose digital output (8 bits) digital output -0.5 VDD + 0.3
outreg9<7:0> General-purpose digital output (8 bits) digital output -0.5 VDD + 0.3
outregA<7:0> General-purpose digital output (8 bits) digital output -0.5 VDD + 0.3
outregB<7:0> General-purpose digital output (8 bits) digital output -0.5 VDD + 0.3
outregC<7:0> General-purpose digital output (8 bits) digital output -0.5 VDD + 0.3
outregD<7:0> General-purpose digital output (8 bits) digital output -0.5 VDD + 0.3
outregE<7:0> General-purpose digital output (8 bits) digital output -0.5 VDD + 0.3
outregF<7:0> General-purpose digital output (8 bits) digital output -0.5 VDD + 0.3
vdd! Positive digital power supply power inout 3.0 3.6
gnd! Digital Ground ground inout 0 0

Global Conditions

Name Typical Minimum Maximum Units
VDD 3.3 V
Ground 0 V

Physical Parameters

Parameter Typical Minimum Maximum Units
device_area µm²
area µm²
width µm
height µm
DRC_errors
LVS_errors

Figure(s)

ef16_spi_controller_symbol.svg

Figure 1

Summary

Catalog ID

EF16_SPI_CONTROLLER

IP Provider

community

Designer

efabless-engineering

Type

Hard IP

Node

350nm

Vendor

efabless

Foundry

X-FAB

Process

EFXH035B

Category

N/A

Certifications

icon

Licensing

Info

Contact Designer

Maturity

Stage

schematic

# of Tries

25

Library Package

Version

3.0

Version Date

Aug 30, 2019