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SK-28SOI-PHY-HDMIDPRX-3V3-8ML

Sankalp

28SOI_PHY_HDMITX_6G0_1V8_8ML is the electrical layer of the HDMI. It receives three streams of 10-bit transition minimized data as input along with synchronous TMDS clock. It serializes and transmits them in differential form over three channels. The clock is also transmitted along with the data as a differential signal according to the specifications. This block consists of high speed serializer and output differential buffers along with the differential output pads and power supplies required by the block. The electrical layer can work over the TMDS clock range from 25MHz to 600MHz.

  • Compliant with HDMI 2.0 specification.
  • Input clock (TMDS_CLK) from 10MHz to 600MHz range.
  • Supports upto 4K2K @ 60 Hz, 3D 1080p @60Hz.
  • Up to 18Gbps BitRate (3 X 6Gbps/Channel).
  • Pre-emphasis can be programmed as per the Board/Package parasitics.
  • 1.8V+150mV (Analog Supply), 1.0V Digital Supply (0.85V to1.1V)
  • IOs integrated in the IP.
  • Digital and custom digital can be tested.
  • At Speed BIST incorporated.
  • In-built PRBS for Electrical Testing

Summary

Catalog ID

SK-28SOI-PHY-HDMIDPRX-3V3-8ML

IP Provider

design house

Designer

Sankalp

Type

Hard IP

Node

28nm

Vendor

Sankalp

Foundry

STMicro

Process

28FDSOI

Category

HDMI

Certifications

icon

Licensing

Info

Contact Designer

Maturity

Stage

product

# of Tries

0

Library Package

Version

1.0

Version Date

Oct 01, 2018