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A 32-bit timer with a prescaler.

It has input timer compare register (TMCMP), and timer overflow signal (TMROV) that is set when the counter exceeds the value in timer compare register. The timer overflow signal can be cleared by a control signal (TMROVCLR). 

  • 32-bit  
  • sets overflow flag when counter exceeds value in timer compare register

Summary

Catalog ID

APB2TMR

IP Provider

Vendor

Designer

Efabless

Type

Soft IP

Node

N/A

Vendor

Efabless

Foundry

N/A

Process
Category

Timer

Certifications

icon

Licensing

Info

Contact Designer

Maturity

Stage

silicon

# of Tries

0

Library Package

Version

2.0

Version Date

Feb 16, 2021