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I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices. It is most suitable for applications requiring occasional communication over a short distance between many devices.

The I2C standard is a true multi-master bus including collision detection and arbitration that prevents data corruption if two or more masters attempt to control the bus simultaneously.

The interface defines 3 transmission speeds:

  • Normal: 100Kbps
  • Fast: 400Kbps
  • High speed: 3.5Mbps

Only 100Kbps and 400Kbps modes are supported directly. For High speed special IOs are needed. If these IOs are available and used, then High speed is also supported.

 

More information can be found at https://opencores.org/projects/i2c

  • APB compatible
  • Compatible with Philips I2C standard
  • Multi Master Operation
  • Software programmable clock frequency
  • Clock Stretching and Wait state generation
  • Software programmable acknowledge bit
  • Interrupt or bit-polling driven byte-by-byte data-transfers
  • Arbitration lost interrupt, with automatic transfer cancelation
  • Start/Stop/Repeated Start/Acknowledge generation
  • Start/Stop/Repeated Start detection
  • Bus busy detection
  • Supports 7 and 10bit addressing mode
  • Operates from a wide range of input clock frequencies
  • Static synchronous design
  • Fully synthesizable

Summary

Catalog ID

APB2I2C

IP Provider

N/A

Designer

Richard Herveille

Type

Soft IP

Node

N/A

Vendor

OpenCores

Foundry

N/A

Process
Category

I2C

Certifications

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Licensing

Info

Contact Designer

Maturity

Stage

silicon

# of Tries

2

Library Package

Version

1.0

Version Date

Jul 03, 2003